From: Marek Olšák <marek.olsak@amd.com>
Date: Mon, 26 Mar 2018 21:13:31 +0000 (-0400)
Subject: radeonsi: don't use the SPI barrier management bug workaround
X-Git-Tag: upstream/18.1.0~593
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3fea237c85c275a0d1e735d3c0a3d9cccefb512e;p=platform%2Fupstream%2Fmesa.git

radeonsi: don't use the SPI barrier management bug workaround

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 8ae742c..00ebbb9 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -7971,6 +7971,11 @@ static bool si_shader_select_ps_parts(struct si_screen *sscreen,
 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
 				      unsigned *lds_size)
 {
+	/* If tessellation is all offchip and on-chip GS isn't used, this
+	 * workaround is not needed.
+	 */
+	return;
+
 	/* SPI barrier management bug:
 	 *   Make sure we have at least 4k of LDS in use to avoid the bug.
 	 *   It applies to workgroup sizes of more than one wavefront.