From: Geert Uytterhoeven Date: Tue, 4 May 2021 09:17:22 +0000 (+0200) Subject: clk: renesas: cpg-mssr: Make srstclr[] comment block consistent X-Git-Tag: accepted/tizen/unified/20230118.172025~6866^2~13^3~1^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3f6ecaf1cad98b266ba3eea4691a71c9ccac8076;p=platform%2Fkernel%2Flinux-rpi.git clk: renesas: cpg-mssr: Make srstclr[] comment block consistent Make the style of the comment block for the Software Reset Clearing Register offsets consistent with the comment blocks for the other register offsets. Signed-off-by: Geert Uytterhoeven Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/97dde75fe3ff27b9639c59a43cddbd9d5c405d0c.1620119700.git.geert+renesas@glider.be --- diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index c323039..21f762a 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -100,7 +100,9 @@ static const u16 srcr_for_v3u[] = { 0x2C20, 0x2C24, 0x2C28, 0x2C2C, 0x2C30, 0x2C34, 0x2C38, }; -/* Software Reset Clearing Register offsets */ +/* + * Software Reset Clearing Register offsets + */ static const u16 srstclr[] = { 0x940, 0x944, 0x948, 0x94C, 0x950, 0x954, 0x958, 0x95C,