From: Kostya Serebryany <kcc@google.com>
Date: Tue, 3 Mar 2015 02:45:21 +0000 (+0000)
Subject: [asan] Since x32 has 32-bit pointers, it should use the same code sequence as ia32... 
X-Git-Tag: llvmorg-3.7.0-rc1~10377
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3e7825efb5d5a944f445fdfc252a911ef3f43e47;p=platform%2Fupstream%2Fllvm.git

[asan] Since x32 has 32-bit pointers, it should use the same code sequence as ia32 for AddressSanitizer asm_flags test. Patch by H.J. Lu

llvm-svn: 231052
---

diff --git a/compiler-rt/lib/asan/tests/asan_asm_test.cc b/compiler-rt/lib/asan/tests/asan_asm_test.cc
index 1d8b04d..200de2c 100644
--- a/compiler-rt/lib/asan/tests/asan_asm_test.cc
+++ b/compiler-rt/lib/asan/tests/asan_asm_test.cc
@@ -232,7 +232,7 @@ TEST(AddressSanitizer, asm_flags) {
   long magic = 0x1234;
   long r = 0x0;
 
-#if defined(__x86_64__)
+#if defined(__x86_64__) && !defined(__ILP32__)
   __asm__("xorq %%rax, %%rax  \n\t"
           "movq (%[p]), %%rax \n\t"
           "sete %%al          \n\t"
@@ -248,7 +248,7 @@ TEST(AddressSanitizer, asm_flags) {
           : [r] "=r"(r)
           : [p] "r"(&magic)
           : "eax", "memory");
-#endif // defined(__x86_64__)
+#endif // defined(__x86_64__) && !defined(__ILP32__)
 
   ASSERT_EQ(0x1, r);
 }