From: Andrew Bresticker <abrestic@chromium.org>
Date: Fri, 27 Dec 2013 00:44:27 +0000 (-0800)
Subject: clk: tegra: use max divider if divider overflows
X-Git-Tag: upstream/snapshot3+hdmi~3337^2~4^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3de5bdfb4cb3bd99052a4ffaee358189779be042;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git

clk: tegra: use max divider if divider overflows

When requesting a rate less than the minimum clock rate for a divider,
use the maximum divider value instead of bailing out with an error.
This matches the behavior of the generic clock divider.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---

diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 4d75b1f..290f9c1 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -59,7 +59,7 @@ static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
 		return 0;
 
 	if (divider_ux1 > get_max_div(divider))
-		return -EINVAL;
+		return get_max_div(divider);
 
 	return divider_ux1;
 }