From: Bin Meng Date: Thu, 7 May 2015 13:34:10 +0000 (+0800) Subject: x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h X-Git-Tag: v2015.07-rc2~40 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3d5bbbc47190071a69fca817647ed3ec13a36d81;p=platform%2Fkernel%2Fu-boot.git x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect DRAM size printed when booting from coreboot, like this: CPU: x86, vendor Intel, device 663h DRAM: 636 KiB Using default environment Change it to 8 which should be enough for both coreboot and bare cases, and move it to x86-common.h. Signed-off-by: Bin Meng Acked-by: Simon Glass --- diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 4fef433..0e1f046 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -17,8 +17,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M diff --git a/include/configs/galileo.h b/include/configs/galileo.h index f780b8f..083d8b4 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_X86_SERIAL /* ns16550 UART is memory-mapped in Quark SoC */ diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 2a1915d..bc2c580 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 463620d..bb3c085 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_X86_SERIAL #define CONFIG_PCI_MEM_BUS 0xc0000000 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index b6a76fe..e0e7fca 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -14,7 +14,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R -#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index bf4758e..31f9904 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -21,6 +21,7 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_DISPLAY_CPUINFO #define CONFIG_LAST_STAGE_INIT +#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_LMB #define CONFIG_OF_LIBFDT