From: YueHaibing <yuehaibing@huawei.com>
Date: Mon, 8 Jul 2019 07:13:56 +0000 (+0800)
Subject: fpga-manager: altera-ps-spi: Fix build error
X-Git-Tag: v5.15~5811^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3d139703d397f6281368047ba7ad1c8bf95aa8ab;p=platform%2Fkernel%2Flinux-starfive.git

fpga-manager: altera-ps-spi: Fix build error

If BITREVERSE is m and FPGA_MGR_ALTERA_PS_SPI is y,
build fails:

drivers/fpga/altera-ps-spi.o: In function `altera_ps_write':
altera-ps-spi.c:(.text+0x4ec): undefined reference to `byte_rev_table'

Select BITREVERSE to fix this.

Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: fcfe18f885f6 ("fpga-manager: altera-ps-spi: use bitrev8x4")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Cc: stable <stable@vger.kernel.org>
Acked-by: Moritz Fischer <mdf@kernel.org>
Link: https://lore.kernel.org/r/20190708071356.50928-1-yuehaibing@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 474f304e..cdd4f73 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -40,6 +40,7 @@ config ALTERA_PR_IP_CORE_PLAT
 config FPGA_MGR_ALTERA_PS_SPI
 	tristate "Altera FPGA Passive Serial over SPI"
 	depends on SPI
+	select BITREVERSE
 	help
 	  FPGA manager driver support for Altera Arria/Cyclone/Stratix
 	  using the passive serial interface over SPI.