From: kazu Date: Sun, 18 Feb 2007 02:18:25 +0000 (+0000) Subject: * config/ia64/ia64.h, config/ia64/ia64.md, X-Git-Tag: upstream/4.9.2~50316 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3cc94518157350cad0482a0820a71c64a3fd8043;p=platform%2Fupstream%2Flinaro-gcc.git * config/ia64/ia64.h, config/ia64/ia64.md, config/ia64/predicates.md, config/ia64/sysv4.h: Follow spelling conventions. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122087 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8e10471..c20044c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2007-02-18 Kazu Hirata + + * config/ia64/ia64.h, config/ia64/ia64.md, + config/ia64/predicates.md, config/ia64/sysv4.h: Follow + spelling conventions. + 2007-02-18 Roman Zippel * config/m68k/m68k.c (split_di): New. diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h index c6d2c0d..9e33042 100644 --- a/gcc/config/ia64/ia64.h +++ b/gcc/config/ia64/ia64.h @@ -175,7 +175,7 @@ extern enum processor_type ia64_tune; You need not define this macro if the `POINTER_SIZE' is equal to the width of `Pmode'. */ -/* Need this for 32 bit pointers, see hpux.h for setting it. */ +/* Need this for 32-bit pointers, see hpux.h for setting it. */ /* #define POINTERS_EXTEND_UNSIGNED */ /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and @@ -206,7 +206,7 @@ while (0) #define FUNCTION_BOUNDARY 128 /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word - 128 bit integers all require 128 bit alignment. */ + 128-bit integers all require 128-bit alignment. */ #define BIGGEST_ALIGNMENT 128 /* If defined, a C expression to compute the alignment for a static variable. @@ -910,19 +910,19 @@ enum reg_class letters (`I', `J', `K', .. 'P') that specify particular ranges of integer values. */ -/* 14 bit signed immediate for arithmetic instructions. */ +/* 14-bit signed immediate for arithmetic instructions. */ #define CONST_OK_FOR_I(VALUE) \ ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000) -/* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */ +/* 22-bit signed immediate for arith instructions with r0/r1/r2/r3 source. */ #define CONST_OK_FOR_J(VALUE) \ ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000) -/* 8 bit signed immediate for logical instructions. */ +/* 8-bit signed immediate for logical instructions. */ #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100) -/* 8 bit adjusted signed immediate for compare pseudo-ops. */ +/* 8-bit adjusted signed immediate for compare pseudo-ops. */ #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100) -/* 6 bit unsigned immediate for shift counts. */ +/* 6-bit unsigned immediate for shift counts. */ #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40) -/* 9 bit signed immediate for load/store post-increments. */ +/* 9-bit signed immediate for load/store post-increments. */ #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200) /* 0 for r0. Used by Linux kernel, do not change. */ #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 23a2974..2704089 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -1408,7 +1408,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 1 bit Integer arithmetic +;; :: 1-bit Integer arithmetic ;; :: ;; :::::::::::::::::::: @@ -1921,7 +1921,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 16 bit Integer arithmetic +;; :: 16-bit Integer arithmetic ;; :: ;; :::::::::::::::::::: @@ -1936,7 +1936,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 32 bit Integer arithmetic +;; :: 32-bit Integer arithmetic ;; :: ;; :::::::::::::::::::: @@ -2234,7 +2234,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 64 bit Integer arithmetic +;; :: 64-bit Integer arithmetic ;; :: ;; :::::::::::::::::::: @@ -2714,7 +2714,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 128 bit Integer arithmetic +;; :: 128-bit Integer arithmetic ;; :: ;; :::::::::::::::::::: @@ -2908,7 +2908,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 32 bit floating point arithmetic +;; :: 32-bit floating point arithmetic ;; :: ;; :::::::::::::::::::: @@ -3313,7 +3313,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 64 bit floating point arithmetic +;; :: 64-bit floating point arithmetic ;; :: ;; :::::::::::::::::::: @@ -3831,7 +3831,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 80 bit floating point arithmetic +;; :: 80-bit floating point arithmetic ;; :: ;; :::::::::::::::::::: @@ -4536,7 +4536,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 32 bit Integer Shifts and Rotates +;; :: 32-bit Integer Shifts and Rotates ;; :: ;; :::::::::::::::::::: @@ -4676,7 +4676,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 64 bit Integer Shifts and Rotates +;; :: 64-bit Integer Shifts and Rotates ;; :: ;; :::::::::::::::::::: @@ -4788,7 +4788,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 128 bit Integer Shifts and Rotates +;; :: 128-bit Integer Shifts and Rotates ;; :: ;; :::::::::::::::::::: @@ -4981,7 +4981,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 32 bit Integer Logical operations +;; :: 32-bit Integer Logical operations ;; :: ;; :::::::::::::::::::: @@ -5008,7 +5008,7 @@ ;; :::::::::::::::::::: ;; :: -;; :: 64 bit Integer Logical operations +;; :: 64-bit Integer Logical operations ;; :: ;; :::::::::::::::::::: @@ -6492,7 +6492,7 @@ [(set_attr "itanium_class" "ignore") (set_attr "predicable" "no")]) -;; UNSPEC instruction definition to "swizzle" 32 bit pointer into 64 bit +;; UNSPEC instruction definition to "swizzle" 32-bit pointer into 64-bit ;; pointer. This is used by the HP-UX 32 bit mode. (define_insn "ptr_extend" diff --git a/gcc/config/ia64/predicates.md b/gcc/config/ia64/predicates.md index 657c150..3dd5973 100644 --- a/gcc/config/ia64/predicates.md +++ b/gcc/config/ia64/predicates.md @@ -424,38 +424,38 @@ (and (match_code "const_int,const_double,const_vector") (match_test "op == CONST0_RTX (GET_MODE (op))")))) -;; True if OP is a GR register operand, or a 5 bit immediate operand. +;; True if OP is a GR register operand, or a 5-bit immediate operand. (define_predicate "gr_reg_or_5bit_operand" (ior (match_operand 0 "gr_register_operand") (and (match_code "const_int") (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))) -;; True if OP is a GR register operand, or a 6 bit immediate operand. +;; True if OP is a GR register operand, or a 6-bit immediate operand. (define_predicate "gr_reg_or_6bit_operand" (ior (match_operand 0 "gr_register_operand") (and (match_code "const_int") (match_test "CONST_OK_FOR_M (INTVAL (op))")))) -;; True if OP is a GR register operand, or an 8 bit immediate operand. +;; True if OP is a GR register operand, or an 8-bit immediate operand. (define_predicate "gr_reg_or_8bit_operand" (ior (match_operand 0 "gr_register_operand") (and (match_code "const_int") (match_test "CONST_OK_FOR_K (INTVAL (op))")))) -;; True if OP is a GR/FR register operand, or an 8 bit immediate operand. +;; True if OP is a GR/FR register operand, or an 8-bit immediate operand. (define_predicate "grfr_reg_or_8bit_operand" (ior (match_operand 0 "grfr_register_operand") (and (match_code "const_int") (match_test "CONST_OK_FOR_K (INTVAL (op))")))) -;; True if OP is a register operand, or an 8 bit adjusted immediate operand. +;; True if OP is a register operand, or an 8-bit adjusted immediate operand. (define_predicate "gr_reg_or_8bit_adjusted_operand" (ior (match_operand 0 "gr_register_operand") (and (match_code "const_int") (match_test "CONST_OK_FOR_L (INTVAL (op))")))) -;; True if OP is a register operand, or is valid for both an 8 bit -;; immediate and an 8 bit adjusted immediate operand. This is necessary +;; True if OP is a register operand, or is valid for both an 8-bit +;; immediate and an 8-bit adjusted immediate operand. This is necessary ;; because when we emit a compare, we don't know what the condition will be, ;; so we need the union of the immediates accepted by GT and LT. (define_predicate "gr_reg_or_8bit_and_adjusted_operand" @@ -464,34 +464,34 @@ (match_test "CONST_OK_FOR_K (INTVAL (op)) && CONST_OK_FOR_L (INTVAL (op))")))) -;; True if OP is a register operand, or a 14 bit immediate operand. +;; True if OP is a register operand, or a 14-bit immediate operand. (define_predicate "gr_reg_or_14bit_operand" (ior (match_operand 0 "gr_register_operand") (and (match_code "const_int") (match_test "CONST_OK_FOR_I (INTVAL (op))")))) -;; True if OP is a register operand, or a 22 bit immediate operand. +;; True if OP is a register operand, or a 22-bit immediate operand. (define_predicate "gr_reg_or_22bit_operand" (ior (match_operand 0 "gr_register_operand") (and (match_code "const_int") (match_test "CONST_OK_FOR_J (INTVAL (op))")))) -;; True if OP is a 7 bit immediate operand. +;; True if OP is a 7-bit immediate operand. (define_predicate "dshift_count_operand" (and (match_code "const_int") (match_test "INTVAL (op) >= 0 && INTVAL (op) < 128"))) -;; True if OP is a 6 bit immediate operand. +;; True if OP is a 6-bit immediate operand. (define_predicate "shift_count_operand" (and (match_code "const_int") (match_test "CONST_OK_FOR_M (INTVAL (op))"))) -;; True if OP-1 is a 6 bit immediate operand, used in extr instruction. +;; True if OP-1 is a 6-bit immediate operand, used in extr instruction. (define_predicate "extr_len_operand" (and (match_code "const_int") (match_test "CONST_OK_FOR_M (INTVAL (op) - 1)"))) -;; True if OP is a 5 bit immediate operand. +;; True if OP is a 5-bit immediate operand. (define_predicate "shift_32bit_count_operand" (and (match_code "const_int") (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))) diff --git a/gcc/config/ia64/sysv4.h b/gcc/config/ia64/sysv4.h index bc85108..5e93d4c 100644 --- a/gcc/config/ia64/sysv4.h +++ b/gcc/config/ia64/sysv4.h @@ -84,8 +84,8 @@ do { \ #define DBX_REGISTER_NUMBER(REGNO) \ ia64_dbx_register_number(REGNO) -/* Things that svr4.h defines to the wrong type, because it assumes 32 bit - ints and 32 bit longs. */ +/* Things that svr4.h defines to the wrong type, because it assumes 32-bit + ints and 32-bit longs. */ #undef SIZE_TYPE #define SIZE_TYPE "long unsigned int"