From: Simon Pilgrim Date: Sun, 21 Aug 2022 15:51:45 +0000 (+0100) Subject: Revert rG15de7aaae52ef4be9f9ff3b130804e5b5ccd29f4 "[CostModel][X86] Add CodeSize... X-Git-Tag: upstream/17.0.6~35863 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3c4391b4bb1f2bff37fa3c4b7255f7feeaa5b90a;p=platform%2Fupstream%2Fllvm.git Revert rG15de7aaae52ef4be9f9ff3b130804e5b5ccd29f4 "[CostModel][X86] Add CodeSize/SizeLatency handling for fadd/fsub/fmul/fsqrt ops" This is unintentionally affecting some backend tests --- diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index eaf6751..63a6dce 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -286,22 +286,10 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost( } // TODO: Handle more cost kinds. - if (CostKind != TTI::TCK_RecipThroughput) { - // Handle some basic single instruction code size cases. - if (CostKind == TTI::TCK_CodeSize || CostKind == TTI::TCK_SizeAndLatency) { - switch (ISD) { - case ISD::FADD: - case ISD::FSUB: - case ISD::FMUL: - return LT.first; - break; - } - } - + if (CostKind != TTI::TCK_RecipThroughput) return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Op1Info, Op2Info, Opd1PropInfo, Opd2PropInfo, Args, CxtI); - } static const CostTblEntry GLMCostTable[] = { { ISD::FDIV, MVT::f32, 18 }, // divss @@ -3439,10 +3427,6 @@ X86TTIImpl::getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, return LT.first * Cost; } - // FSQRT is a single instruction. - if (ISD == ISD::FSQRT && CostKind == TTI::TCK_CodeSize) - return LT.first; - auto adjustTableCost = [](const CostTblEntry &Entry, InstructionCost LegalizationCost, FastMathFlags FMF) { diff --git a/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll b/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll index 15b4231..5dccd4d 100644 --- a/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll +++ b/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll @@ -1,60 +1,27 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=-sse2 | FileCheck %s --check-prefixes=CHECK,SSE1 ; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX -; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX +; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42 +; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2 ; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512 ; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512 ; -; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,AVX +; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SLM +; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,GLM +; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 define i32 @fadd(i32 %arg) { -; SSE1-LABEL: 'fadd' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fadd <2 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fadd <4 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fadd <8 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fadd' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fadd <8 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fadd' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fadd <8 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fadd <16 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fadd <4 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fadd <8 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fadd' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fadd <8 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fadd <16 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fadd <4 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fadd <8 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fadd' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fadd <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fadd <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fadd <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fadd <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fadd float undef, undef %V4F32 = fadd <4 x float> undef, undef @@ -70,49 +37,16 @@ define i32 @fadd(i32 %arg) { } define i32 @fsub(i32 %arg) { -; SSE1-LABEL: 'fsub' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <4 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fsub <8 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fsub' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fsub' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fsub <16 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fsub <8 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fsub' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fsub' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fsub float undef, undef %V4F32 = fsub <4 x float> undef, undef @@ -128,49 +62,16 @@ define i32 @fsub(i32 %arg) { } define i32 @fneg_idiom(i32 %arg) { -; SSE1-LABEL: 'fneg_idiom' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <4 x double> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fsub <8 x double> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fneg_idiom' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fneg_idiom' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fsub <16 x float> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fsub <8 x double> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fneg_idiom' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fneg_idiom' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fsub float -0.0, undef %V4F32 = fsub <4 x float> , undef @@ -211,49 +112,16 @@ define i32 @fneg(i32 %arg) { } define i32 @fmul(i32 %arg) { -; SSE1-LABEL: 'fmul' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fmul <2 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fmul <4 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fmul <8 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fmul' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fmul <8 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fmul' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fmul <8 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fmul <16 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fmul <4 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fmul <8 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fmul' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fmul <8 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fmul <16 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fmul <4 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fmul <8 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fmul' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fmul <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fmul <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fmul <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fmul <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fmul float undef, undef %V4F32 = fmul <4 x float> undef, undef @@ -320,49 +188,93 @@ define i32 @frem(i32 %arg) { define i32 @fsqrt(i32 %arg) { ; SSE1-LABEL: 'fsqrt' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) ; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SSE1-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) ; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; ; SSE2-LABEL: 'fsqrt' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; -; AVX-LABEL: 'fsqrt' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; SSE42-LABEL: 'fsqrt' +; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; AVX1-LABEL: 'fsqrt' +; AVX1-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 86 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; AVX2-LABEL: 'fsqrt' +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; ; AVX512-LABEL: 'fsqrt' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SLM-LABEL: 'fsqrt' +; SLM-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 70 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 140 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 280 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; GLM-LABEL: 'fsqrt' +; GLM-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 37 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 74 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 148 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 134 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 268 for instruction: %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; %F32 = call float @llvm.sqrt.f32(float undef) %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) @@ -399,6 +311,17 @@ define i32 @fabs(i32 %arg) { ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SSE42-LABEL: 'fabs' +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.fabs.f32(float undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.fabs.f64(double undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; ; AVX-LABEL: 'fabs' ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.fabs.f32(float undef) ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) @@ -421,6 +344,28 @@ define i32 @fabs(i32 %arg) { ; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SLM-LABEL: 'fabs' +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.fabs.f32(float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.fabs.f64(double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; GLM-LABEL: 'fabs' +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.fabs.f32(float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.fabs.f64(double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; %F32 = call float @llvm.fabs.f32(float undef) %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) @@ -457,6 +402,17 @@ define i32 @fcopysign(i32 %arg) { ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SSE42-LABEL: 'fcopysign' +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; ; AVX-LABEL: 'fcopysign' ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) ; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) @@ -479,6 +435,28 @@ define i32 @fcopysign(i32 %arg) { ; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SLM-LABEL: 'fcopysign' +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; GLM-LABEL: 'fcopysign' +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; %F32 = call float @llvm.copysign.f32(float undef, float undef) %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) @@ -515,6 +493,17 @@ define i32 @fma(i32 %arg) { ; SSE2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SSE42-LABEL: 'fma' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; ; AVX-LABEL: 'fma' ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) ; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) @@ -537,6 +526,28 @@ define i32 @fma(i32 %arg) { ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; +; SLM-LABEL: 'fma' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; GLM-LABEL: 'fma' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) diff --git a/llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll b/llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll index 0a73faa..bbeff8a 100644 --- a/llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll +++ b/llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll @@ -12,82 +12,16 @@ ; RUN: opt < %s -enable-no-nans-fp-math -passes="print" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 define i32 @fadd(i32 %arg) { -; SSE1-LABEL: 'fadd' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fadd <2 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fadd <4 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fadd <8 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fadd' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fadd <8 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE42-LABEL: 'fadd' -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fadd <8 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fadd' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fadd <8 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fadd <16 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fadd <4 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fadd <8 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fadd' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fadd <8 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fadd <16 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fadd <4 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fadd <8 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SLM-LABEL: 'fadd' -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fadd <8 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; GLM-LABEL: 'fadd' -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fadd <16 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fadd <8 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fadd' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fadd float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fadd <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fadd <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fadd <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fadd double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fadd <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fadd <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fadd <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fadd float undef, undef %V4F32 = fadd <4 x float> undef, undef @@ -103,82 +37,16 @@ define i32 @fadd(i32 %arg) { } define i32 @fsub(i32 %arg) { -; SSE1-LABEL: 'fsub' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <4 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fsub <8 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fsub' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE42-LABEL: 'fsub' -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fsub' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fsub <16 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fsub <8 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fsub' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SLM-LABEL: 'fsub' -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; GLM-LABEL: 'fsub' -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fsub' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fsub float undef, undef %V4F32 = fsub <4 x float> undef, undef @@ -194,82 +62,16 @@ define i32 @fsub(i32 %arg) { } define i32 @fneg_idiom(i32 %arg) { -; SSE1-LABEL: 'fneg_idiom' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <4 x double> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fsub <8 x double> , undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fneg_idiom' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> , undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE42-LABEL: 'fneg_idiom' -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> , undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fneg_idiom' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fsub <16 x float> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fsub <8 x double> , undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fneg_idiom' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> , undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SLM-LABEL: 'fneg_idiom' -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> , undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; GLM-LABEL: 'fneg_idiom' -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fsub <16 x float> , undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fsub <8 x double> , undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fneg_idiom' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fsub float -0.000000e+00, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fsub <4 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fsub <8 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fsub <16 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fsub double -0.000000e+00, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fsub <2 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fsub <4 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fsub <8 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fsub float -0.0, undef %V4F32 = fsub <4 x float> , undef @@ -310,82 +112,16 @@ define i32 @fneg(i32 %arg) { } define i32 @fmul(i32 %arg) { -; SSE1-LABEL: 'fmul' -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fmul <2 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fmul <4 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fmul <8 x double> undef, undef -; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE2-LABEL: 'fmul' -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fmul <8 x double> undef, undef -; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SSE42-LABEL: 'fmul' -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fmul <8 x double> undef, undef -; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX-LABEL: 'fmul' -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fmul <8 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fmul <16 x float> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fmul <4 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fmul <8 x double> undef, undef -; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; AVX512-LABEL: 'fmul' -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fmul <8 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fmul <16 x float> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fmul <4 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fmul <8 x double> undef, undef -; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; SLM-LABEL: 'fmul' -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fmul <8 x double> undef, undef -; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef -; -; GLM-LABEL: 'fmul' -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fmul <16 x float> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fmul <8 x double> undef, undef -; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-LABEL: 'fmul' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fmul float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fmul <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fmul <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fmul <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fmul double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fmul <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fmul <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fmul <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fmul float undef, undef %V4F32 = fmul <4 x float> undef, undef diff --git a/llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll b/llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll index 70de98a..8f96c85 100644 --- a/llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll +++ b/llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll @@ -139,12 +139,12 @@ define void @fmuladd(float %a, float %b, float %c, <16 x float> %va, <16 x float ; ; SIZE-LABEL: 'fmuladd' ; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s = call float @llvm.fmuladd.f32(float %a, float %b, float %c) -; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v = call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x float> %vc) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v = call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x float> %vc) ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; ; SIZE_LATE-LABEL: 'fmuladd' ; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s = call float @llvm.fmuladd.f32(float %a, float %b, float %c) -; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v = call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x float> %vc) +; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v = call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x float> %vc) ; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %s = call float @llvm.fmuladd.f32(float %a, float %b, float %c)