From: Roman Lebedev Date: Mon, 4 Oct 2021 16:30:07 +0000 (+0300) Subject: [X86][Costmodel] Load/store i32/f32 Stride=4 VF=4 interleaving costs X-Git-Tag: upstream/15.0.7~29600 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3c2e22b795485df28ca898bd3a58b6478c1e903d;p=platform%2Fupstream%2Fllvm.git [X86][Costmodel] Load/store i32/f32 Stride=4 VF=4 interleaving costs The only sched models that for cpu's that support avx2 but not avx512 are: haswell, broadwell, skylake, zen1-3 For load we have: https://godbolt.org/z/avq1oz98W - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: =4.0` So could pick cost of `8`. For store we have: https://godbolt.org/z/89PGMc1qs - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=6.0` So we could pick cost of `6`. I'm directly using the shuffling asm the llc produced, without any manual fixups that may be needed to ensure sequential execution. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D111061 --- diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index 23c68bb..dafb3402 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -5129,6 +5129,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2( {4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16 {4, MVT::v2i32, 4}, // (load 8i32 and) deinterleave into 4 x 2i32 + {4, MVT::v4i32, 8}, // (load 16i32 and) deinterleave into 4 x 4i32 {6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8 {6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8 @@ -5203,6 +5204,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2( {4, MVT::v32i16, 64}, // interleave 4 x 32i16 into 128i16 (and store) {4, MVT::v2i32, 5}, // interleave 4 x 2i32 into 8i32 (and store) + {4, MVT::v4i32, 6}, // interleave 4 x 4i32 into 16i32 (and store) {6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store) {6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store) diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll index 267e044..230d3e8 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll @@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu" ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4 ; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load float, float* %in0, align 4 -; AVX2: LV: Found an estimated cost of 34 for VF 4 For instruction: %v0 = load float, float* %in0, align 4 +; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction: %v0 = load float, float* %in0, align 4 ; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction: %v0 = load float, float* %in0, align 4 ; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction: %v0 = load float, float* %in0, align 4 ; diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll index 6e389d8..c5ad77e 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll @@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu" ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4 ; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4 -; AVX2: LV: Found an estimated cost of 42 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4 +; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4 ; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4 ; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4 ; diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll index cbd27c5..4daa4ef 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll @@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu" ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v3, float* %out3, align 4 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store float %v3, float* %out3, align 4 -; AVX2: LV: Found an estimated cost of 30 for VF 4 For instruction: store float %v3, float* %out3, align 4 +; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: store float %v3, float* %out3, align 4 ; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction: store float %v3, float* %out3, align 4 ; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction: store float %v3, float* %out3, align 4 ; diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll index 7b8d321..3e0d810 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll @@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu" ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v3, i32* %out3, align 4 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4 -; AVX2: LV: Found an estimated cost of 38 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4 +; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4 ; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction: store i32 %v3, i32* %out3, align 4 ; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction: store i32 %v3, i32* %out3, align 4 ;