From: Ulrich Drepper Date: Fri, 2 Jan 2009 02:52:05 +0000 (-0800) Subject: Add Intel SSE4 support to disassembler. X-Git-Tag: elfutils-0.139~39 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3bf5759aa0cf1cd8f771ce3e34346c7510b89e5f;p=platform%2Fupstream%2Felfutils.git Add Intel SSE4 support to disassembler. --- diff --git a/NEWS b/NEWS index baa9d59..5448874 100644 --- a/NEWS +++ b/NEWS @@ -1,3 +1,7 @@ +Version 0.139: + +libcpu: Add Intel SSE4 disassembler support + Version 0.138: Install header file for applications to use in source diff --git a/TODO b/TODO index b2bcf6e..bc37414 100644 --- a/TODO +++ b/TODO @@ -1,7 +1,7 @@ ToDo list for elfutils -*-outline-*- ---------------------- -Time-stamp: <2008-02-03 14:15:41 drepper> +Time-stamp: <2009-01-01 16:56:38 drepper> * mkinstalldirs @@ -38,6 +38,20 @@ Time-stamp: <2008-02-03 14:15:41 drepper> ** Rename dwarf_getabbrev +* libcpu + +** x86 + +*** Opcodes + + crc32 + extractps + pextrb + pextrd/pextrq + pextrw + pinsrq + popcnt 64-bit reg + * nm: ** add demangler support @@ -156,5 +170,5 @@ Time-stamp: <2008-02-03 14:15:41 drepper> -V Print on standard error the version number of mcs. Local Variables: -eval:(hide-body) +eval:(hide-sublevels 3) End: diff --git a/libcpu/ChangeLog b/libcpu/ChangeLog index 5bc89f9..4b94d26 100644 --- a/libcpu/ChangeLog +++ b/libcpu/ChangeLog @@ -1,5 +1,18 @@ +2009-01-01 Ulrich Drepper + + * i386_disasm.c (i386_disasm): Reset bufcnt when not matched. We + don't expect snprintf to fail. + 2008-12-31 Ulrich Drepper + * defs/i386: Add dppd, dpps, insertps, movntdqa, mpsadbw, packusdw, + pblendvb, pblendw, pcmpeqq, pcmpestri, pcmpestrm, pcmpistri, pcmpistrm, + pcmpgtq, phminposuw, pinsrb, pinsrd, pmaxsb, pmaxsd, pmaxud, pmaxuw, + pminsb, pminsd, pminud, pminuw, pmovsxbw, pmovsxbd, pmovsxbq, pmovsxwd, + pmovsxwq, pmovsxdq, pmovzxbw, pmovzxbd, pmovzxbq, pmovzxwd, pmovzxwq, + pmovzxdq, pmuldq, pmulld, popcnt, ptest, roundss, roundps, roundpd, + and roundsd opcodes. + * i386_disasm.c (i386_disasm): Correct resizing of buffer. * i386_parse.y (struct argstring): Add off element. diff --git a/libcpu/defs/i386 b/libcpu/defs/i386 index d928a4d..e0db28d 100644 --- a/libcpu/defs/i386 +++ b/libcpu/defs/i386 @@ -437,6 +437,9 @@ ifdef(`i386', ', `10010000:INVALID ')dnl +# ORDER before out +11110011,00001111,10111000,{mod}{reg}{r_m}:popcnt {mod}{r_m},{reg} +# END ORDER 1111011{w},{mod}010{r_m}:not{w} {mod}{r_m}{w} 0000100{w},{mod}{reg}{r_m}:or {reg}{w},{mod}{r_m}{w} 0000101{w},{mod}{reg}{r_m}:or {mod}{r_m}{w},{reg}{w} @@ -916,6 +919,51 @@ ifdef(`i386', 01100110,00001111,00111010,00001101,{Mod}{xmmreg}{R_m},{imm8}:blendpd {imm8},{Mod}{R_m},{xmmreg} 01100110,00001111,00111000,00010100,{Mod}{xmmreg}{R_m}:blendvps %xmm0,{Mod}{R_m},{xmmreg} 01100110,00001111,00111000,00010101,{Mod}{xmmreg}{R_m}:blendvpd %xmm0,{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01000000,{Mod}{xmmreg}{R_m},{imm8}:dpps {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01000001,{Mod}{xmmreg}{R_m},{imm8}:dppd {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00100001,{Mod}{xmmreg}{R_m},{imm8}:insertps {imm8},{Mod}{R_m},{xmmreg} +# Mod == 11 is not valid +01100110,00001111,00111000,00101010,{Mod}{xmmreg}{R_m}:movntdqa {Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01000010,{Mod}{xmmreg}{R_m},{imm8}:mpsadbw {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00101011,{Mod}{xmmreg}{R_m}:packusdw {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00010000,{Mod}{xmmreg}{R_m}:pblendvb %xmm0,{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00001110,{Mod}{xmmreg}{R_m},{imm8}:pblendw {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00101001,{Mod}{xmmreg}{R_m}:pcmpeqq {Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01100001,{Mod}{xmmreg}{R_m},{imm8}:pcmpestri {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01100000,{Mod}{xmmreg}{R_m},{imm8}:pcmpestrm {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01100011,{Mod}{xmmreg}{R_m},{imm8}:pcmpistri {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,01100010,{Mod}{xmmreg}{R_m},{imm8}:pcmpistrm {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110111,{Mod}{xmmreg}{R_m}:pcmpgtq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,01000001,{Mod}{xmmreg}{R_m}:phminposuw {Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00100000,{mod}{xmmreg}{r_m},{imm8}:pinsrb {imm8},{mod}{r_m},{xmmreg} +01100110,00001111,00111010,00100010,{mod}{xmmreg}{r_m},{imm8}:pinsrd {imm8},{mod}{r_m},{xmmreg} +01100110,00001111,00111000,00111100,{Mod}{xmmreg}{R_m}:pmaxsb {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111101,{Mod}{xmmreg}{R_m}:pmaxsd {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111111,{Mod}{xmmreg}{R_m}:pmaxud {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111110,{Mod}{xmmreg}{R_m}:pmaxuw {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111000,{Mod}{xmmreg}{R_m}:pminsb {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111001,{Mod}{xmmreg}{R_m}:pminsd {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111011,{Mod}{xmmreg}{R_m}:pminud {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00111010,{Mod}{xmmreg}{R_m}:pminuw {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00100000,{Mod}{xmmreg}{R_m}:pmovsxbw {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00100001,{Mod}{xmmreg}{R_m}:pmovsxbd {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00100010,{Mod}{xmmreg}{R_m}:pmovsxbq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00100011,{Mod}{xmmreg}{R_m}:pmovsxwd {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00100100,{Mod}{xmmreg}{R_m}:pmovsxwq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00100101,{Mod}{xmmreg}{R_m}:pmovsxdq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110000,{Mod}{xmmreg}{R_m}:pmovzxbw {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110001,{Mod}{xmmreg}{R_m}:pmovzxbd {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110010,{Mod}{xmmreg}{R_m}:pmovzxbq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110011,{Mod}{xmmreg}{R_m}:pmovzxwd {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110100,{Mod}{xmmreg}{R_m}:pmovzxwq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00110101,{Mod}{xmmreg}{R_m}:pmovzxdq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00101000,{Mod}{xmmreg}{R_m}:pmuldq {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,01000000,{Mod}{xmmreg}{R_m}:pmulld {Mod}{R_m},{xmmreg} +01100110,00001111,00111000,00010111,{Mod}{xmmreg}{R_m}:ptest {Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00001000,{Mod}{xmmreg}{R_m},{imm8}:roundps {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00001001,{Mod}{xmmreg}{R_m},{imm8}:roundpd {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00001010,{Mod}{xmmreg}{R_m},{imm8}:roundss {imm8},{Mod}{R_m},{xmmreg} +01100110,00001111,00111010,00001011,{Mod}{xmmreg}{R_m},{imm8}:roundsd {imm8},{Mod}{R_m},{xmmreg} # ORDER: dnl Many previous entries depend on this being last. 000{sreg2}111:pop {sreg2} diff --git a/libcpu/i386_disasm.c b/libcpu/i386_disasm.c index 76b5a39..a656cdb 100644 --- a/libcpu/i386_disasm.c +++ b/libcpu/i386_disasm.c @@ -408,6 +408,7 @@ i386_disasm (const uint8_t **startp, const uint8_t *end, GElf_Addr addr, not: curr = start + 2 * len; ++cnt; + bufcnt = 0; goto next_match; } @@ -984,8 +985,7 @@ i386_disasm (const uint8_t **startp, const uint8_t *end, GElf_Addr addr, r = snprintf (&buf[bufcnt], bufavail, "# %#" PRIx64, (uint64_t) symaddr); - if (r < 0) - goto not; + assert (r >= 0); if ((size_t) r >= bufavail) goto enomem; bufcnt += r; diff --git a/tests/ChangeLog b/tests/ChangeLog index 958255a..25f271f 100644 --- a/tests/ChangeLog +++ b/tests/ChangeLog @@ -1,5 +1,16 @@ 2008-12-31 Ulrich Drepper + * testfile44.S.bz2: Add tests for dppd, dpps, insertps, movntdqa, + mpsadbw, packusdw, pblendvb, pblendw, pcmpeqq, pcmpestri, pcmpestrm, + pcmpistri, pcmpistrm, pcmpgtq, phminposuw, pinsrb, pinsrd, pmaxsb, + pmaxsd, pmaxud, pmaxuw, pminsb, pminsd, pminud, pminuw, pmovsxbw, + pmovsxbd, pmovsxbq, pmovsxwd, pmovsxwq, pmovsxdq, pmovsxbw, pmovsxbd, + pmovsxbq, pmovsxwd, pmovsxwq, pmovsxdq, pmuldq, pmulld, popcnt, ptest, + roundss, roundps, roundpd, and roundsd. + * testfile45.S.bz2: Likewise. + * testfile44.expect.bz2: Adjust accordingly. + * testfile45.expect.bz2: Likewise. + * testfile44.S.bz2: Add tests for blendvpd and blendvps. * testfile45.S.bz2: Likewise. * testfile44.expect.bz2: Adjust accordingly. diff --git a/tests/testfile44.S.bz2 b/tests/testfile44.S.bz2 index fb401e5..4e87434 100644 Binary files a/tests/testfile44.S.bz2 and b/tests/testfile44.S.bz2 differ diff --git a/tests/testfile44.expect.bz2 b/tests/testfile44.expect.bz2 index 9e50462..b3937b9 100644 Binary files a/tests/testfile44.expect.bz2 and b/tests/testfile44.expect.bz2 differ diff --git a/tests/testfile45.S.bz2 b/tests/testfile45.S.bz2 index 58bb16b..00e819e 100644 Binary files a/tests/testfile45.S.bz2 and b/tests/testfile45.S.bz2 differ diff --git a/tests/testfile45.expect.bz2 b/tests/testfile45.expect.bz2 index 2cf60b7..b8b33e9 100644 Binary files a/tests/testfile45.expect.bz2 and b/tests/testfile45.expect.bz2 differ