From: Holger Brunck Date: Fri, 2 Dec 2022 17:22:40 +0000 (+0100) Subject: board/km/secu: migrate to use environment text files X-Git-Tag: v2023.07~207^2~8^2~3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3bcf9c08a3de030438fcb91b27bf38e3235aafc5;p=platform%2Fkernel%2Fu-boot.git board/km/secu: migrate to use environment text files Instead of having these defines in a header file, move them to a simple text file. Signed-off-by: Holger Brunck --- diff --git a/board/keymile/secu1/socfpga_secu.env b/board/keymile/secu1/socfpga_secu.env new file mode 100644 index 0000000..147c417 --- /dev/null +++ b/board/keymile/secu1/socfpga_secu.env @@ -0,0 +1,50 @@ +altbootcmd=run bootcmd; +bootlimit=6 +bootnum=1 +bootretry=CONFIG_BOOT_RETRY_TIME + +develop=tftp 0x200000 scripts/develop-secu.txt && + env import -t 0x200000 ${filesize} && + saveenv && + reset + +fdt_addr=CONFIG_KM_FDT_ADDR +load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp +loadaddr=CONFIG_KM_KERNEL_ADDR +newenv=nand erase 0x100000 0x40000 +release=run newenv; reset +socfpga_legacy_reset_compat=1 +update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize} + +userload=ubi part nand.ubi && + ubi check rootfs$bootnum && + ubi read $fdt_addr dtb$bootnum && + ubi read $loadaddr kernel$bootnum + +userboot=setenv bootargs console=ttyS0,115200 ubi.fm_autoconvert=1 uio_pdrv_genirq.of_id="idq,regbank" + ubi.mtd=1 ubi.block=0,rootfs$bootnum root=/dev/ubiblock0_$ubivolid ro + rootfstype=squashfs init=sbin/preinit; + bootz ${loadaddr} - ${fdt_addr} + +verify=y + +/* + * FPGA Remote Update related environment + * + * Note that since those commands access the FPGA, the HPS-to-FPGA bridges + * MUST have been previously enabled (for example with 'bridge enable'). + */ +rmtu_page=0xFF29000C +rmtu_reconfig=0xFF290018 +fpga_safebase=0x0 +fpga_userbase=0x2000000 + +_fpga_loaduser=echo "Loading FPGA USER image..." && + mw ${rmtu_page} ${fpga_userbase} && + mw ${rmtu_reconfig} 1 + +_fpga_loadsafe=echo "Loading FPGA SAFE image..." && + mw ${rmtu_page} ${fpga_safebase} && + mw ${rmtu_reconfig} 1 + + diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 7a805df..6e4fe58 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -3,7 +3,7 @@ CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SYS_MALLOC_F_LEN=0x800 -CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" @@ -24,7 +24,6 @@ CONFIG_BOOT_RETRY=y CONFIG_BOOT_RETRY_TIME=45 CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 ubi.fm_autoconvert=1 uio_pdrv_genirq.of_id=\"idq,regbank\"" CONFIG_BOOTCOMMAND="setenv bootcmd 'bridge enable; if test ${bootnum} = 'b'; then run _fpga_loadsafe; else if test ${bootcount} -eq 4; then echo 'Switching copy...'; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; run _fpga_loaduser; fi;echo 'Booting bank $bootnum' && run userload && run userboot;' && setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && saveenv && saveenv && boot;" CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -65,6 +64,7 @@ CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set +CONFIG_ENV_SOURCE_FILE="socfpga_secu" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 29b4b22..55168c2 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -7,7 +7,6 @@ #define __CONFIG_SOCFPGA_SECU1_H__ #include -#include /* Eternal oscillator */ #define CFG_SYS_TIMER_RATE 40000000 @@ -23,58 +22,6 @@ */ #define CFG_SYS_I2C_RTC_ADDR 0x68 -/* Environment settings */ - -/* - * FPGA Remote Update related environment - * - * Note that since those commands access the FPGA, the HPS-to-FPGA - * bridges MUST have been previously enabled (for example - * with 'bridge enable'). - */ -#define FPGA_RMTU_ENV \ - "rmtu_page=0xFF29000C\0" \ - "rmtu_reconfig=0xFF290018\0" \ - "fpga_safebase=0x0\0" \ - "fpga_userbase=0x2000000\0" \ - "_fpga_loaduser=echo Loading FPGA USER image..." \ - " && mw ${rmtu_page} ${fpga_userbase} && mw ${rmtu_reconfig} 1\0" \ - "_fpga_loadsafe=echo Loading FPGA SAFE image..." \ - " && mw ${rmtu_page} ${fpga_safebase} && mw ${rmtu_reconfig} 1\0" \ - -#define CONFIG_KM_NEW_ENV \ - "newenv=" \ - "nand erase 0x100000 0x40000\0" - -#define CONFIG_KM_DEF_ENV_BOOTTARGETS \ - "release=" \ - "run newenv; reset\0" \ - "develop=" \ - "tftp 0x200000 scripts/develop-secu.txt && env import -t 0x200000 ${filesize} && saveenv && reset\0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - FPGA_RMTU_ENV \ - CONFIG_KM_DEF_ENV_BOOTTARGETS \ - CONFIG_KM_NEW_ENV \ - "socfpga_legacy_reset_compat=1\0" \ - "altbootcmd=run bootcmd;\0" \ - "bootlimit=6\0" \ - "bootnum=1\0" \ - "bootretry=" __stringify(CONFIG_BOOT_RETRY_TIME) "\0" \ - "fdt_addr=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ - "load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp\0" \ - "loadaddr=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ - "update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize}\0" \ - "userload=ubi part nand.ubi &&" \ - "ubi check rootfs$bootnum &&" \ - "ubi read $fdt_addr dtb$bootnum &&" \ - "ubi read $loadaddr kernel$bootnum\0" \ - "userboot=setenv bootargs " CONFIG_BOOTARGS \ - " ubi.mtd=1 ubi.block=0,rootfs$bootnum root=/dev/ubiblock0_$ubivolid" \ - " ro rootfstype=squashfs init=sbin/preinit;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "verify=y\0" - /* The rest of the configuration is shared */ #include diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f829a79..a863665 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -70,8 +70,6 @@ CONFIG_IRAM_BASE CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_IRAM_TOP -CONFIG_KM_DEF_ENV_BOOTTARGETS -CONFIG_KM_NEW_ENV CONFIG_KSNET_CPSW_NUM_PORTS CONFIG_KSNET_MAC_ID_BASE CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE