From: Philip Reames <listmail@philipreames.com>
Date: Tue, 20 Apr 2021 16:41:41 +0000 (-0700)
Subject: [tests] Update per review comment on D99912
X-Git-Tag: llvmorg-14-init~9047
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3b7f6fd26d3efe28da1ae6af6cde9aa80bc92a2c;p=platform%2Fupstream%2Fllvm.git

[tests] Update per review comment on D99912

(I'd copy and pasted the wrong test before tweaking, as a result, it wasn't a very good negative test.)
---

diff --git a/llvm/test/Analysis/ValueTracking/known-non-equal.ll b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
index 6a68dc6..2d6e60c 100644
--- a/llvm/test/Analysis/ValueTracking/known-non-equal.ll
+++ b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
@@ -890,14 +890,15 @@ exit:
   ret i1 %res
 }
 
-define i1 @recurrence_mul_noflags(i8 %A, i8 %B) {
+define i1 @recurrence_mul_noflags(i8 %A) {
 ; CHECK-LABEL: @recurrence_mul_noflags(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
 ; CHECK-NEXT:    [[A_IV_NEXT]] = mul i8 [[A_IV]], 2
 ; CHECK-NEXT:    [[B_IV_NEXT]] = mul i8 [[B_IV]], 2
@@ -908,6 +909,7 @@ define i1 @recurrence_mul_noflags(i8 %A, i8 %B) {
 ; CHECK-NEXT:    ret i1 [[RES]]
 ;
 entry:
+  %B = add i8 %A, 1
   br label %loop
 loop:
   %iv = phi i64 [0, %entry], [%iv.next, %loop]
@@ -1025,14 +1027,15 @@ exit:
   ret i1 %res
 }
 
-define i1 @recurrence_shl_noflags(i8 %A, i8 %B) {
+define i1 @recurrence_shl_noflags(i8 %A) {
 ; CHECK-LABEL: @recurrence_shl_noflags(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
 ; CHECK-NEXT:    [[A_IV_NEXT]] = shl i8 [[A_IV]], 1
 ; CHECK-NEXT:    [[B_IV_NEXT]] = shl i8 [[B_IV]], 1
@@ -1043,6 +1046,7 @@ define i1 @recurrence_shl_noflags(i8 %A, i8 %B) {
 ; CHECK-NEXT:    ret i1 [[RES]]
 ;
 entry:
+  %B = add i8 %A, 1
   br label %loop
 loop:
   %iv = phi i64 [0, %entry], [%iv.next, %loop]
@@ -1160,14 +1164,15 @@ exit:
   ret i1 %res
 }
 
-define i1 @recurrence_lshr_noflags(i8 %A, i8 %B) {
+define i1 @recurrence_lshr_noflags(i8 %A) {
 ; CHECK-LABEL: @recurrence_lshr_noflags(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
 ; CHECK-NEXT:    [[A_IV_NEXT]] = lshr i8 [[A_IV]], 1
 ; CHECK-NEXT:    [[B_IV_NEXT]] = lshr i8 [[B_IV]], 1
@@ -1178,6 +1183,7 @@ define i1 @recurrence_lshr_noflags(i8 %A, i8 %B) {
 ; CHECK-NEXT:    ret i1 [[RES]]
 ;
 entry:
+  %B = add i8 %A, 1
   br label %loop
 loop:
   %iv = phi i64 [0, %entry], [%iv.next, %loop]
@@ -1295,14 +1301,15 @@ exit:
   ret i1 %res
 }
 
-define i1 @recurrence_ashr_noflags(i8 %A, i8 %B) {
+define i1 @recurrence_ashr_noflags(i8 %A) {
 ; CHECK-LABEL: @recurrence_ashr_noflags(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
 ; CHECK-NEXT:    [[A_IV_NEXT]] = ashr i8 [[A_IV]], 1
 ; CHECK-NEXT:    [[B_IV_NEXT]] = ashr i8 [[B_IV]], 1
@@ -1313,6 +1320,7 @@ define i1 @recurrence_ashr_noflags(i8 %A, i8 %B) {
 ; CHECK-NEXT:    ret i1 [[RES]]
 ;
 entry:
+  %B = add i8 %A, 1
   br label %loop
 loop:
   %iv = phi i64 [0, %entry], [%iv.next, %loop]