From: Gert Wollny Date: Sun, 18 Jun 2023 07:11:30 +0000 (+0200) Subject: r600: Split tex CF only if written component is read X-Git-Tag: upstream/23.3.3~6835 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3a569fbf9b6e8eedd8659fc51b9b1378bae9dbf6;p=platform%2Fupstream%2Fmesa.git r600: Split tex CF only if written component is read There is no need to split the CF if only the register ID in a previous write is the same, we should look at the actual slots instead, ut we have also to take writes of 0 and 1 into account. Cc: mesa-stable Signed-off-by: Gert Wollny Part-of: --- diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index bf9de31..ebbba18 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -1539,12 +1539,21 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t if (bc->cf_last != NULL && bc->cf_last->op == CF_OP_TEX) { struct r600_bytecode_tex *ttex; + uint8_t use_mask = ((1 << ntex->src_sel_x) | + (1 << ntex->src_sel_y) | + (1 << ntex->src_sel_z) | + (1 << ntex->src_sel_w)) & 0xf; + LIST_FOR_EACH_ENTRY(ttex, &bc->cf_last->tex, list) { - if (ttex->dst_gpr == ntex->src_gpr && - (ttex->dst_sel_x < 4 || ttex->dst_sel_y < 4 || - ttex->dst_sel_z < 4 || ttex->dst_sel_w < 4)) { - bc->force_add_cf = 1; - break; + if (ttex->dst_gpr == ntex->src_gpr) { + uint8_t write_mask = (ttex->dst_sel_x < 6 ? 1 : 0) | + (ttex->dst_sel_y < 6 ? 2 : 0) | + (ttex->dst_sel_z < 6 ? 4 : 0) | + (ttex->dst_sel_w < 6 ? 8 : 0); + if (use_mask & write_mask) { + bc->force_add_cf = 1; + break; + } } } /* vtx instrs get inserted after tex, so make sure we aren't moving the tex