From: Marek Olšák <marek.olsak@amd.com>
Date: Tue, 21 Feb 2023 16:33:13 +0000 (-0500)
Subject: radeonsi: don't merge SET_* packets that have a different index in si_pm4_state
X-Git-Tag: upstream/23.3.3~12287
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3a26d2b1a7f81ae719037cd734ac776a3c6ab65b;p=platform%2Fupstream%2Fmesa.git

radeonsi: don't merge SET_* packets that have a different index in si_pm4_state

Oops.

Fixes: c8e2c6faf64 ("radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
---

diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c
index d79cd01..635d4aa 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/src/gallium/drivers/radeonsi/si_pm4.c
@@ -63,13 +63,14 @@ static void si_pm4_set_reg_custom(struct si_pm4_state *state, unsigned reg, uint
 
    assert(state->ndw + 2 <= state->max_dw);
 
-   if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
+   if (opcode != state->last_opcode || reg != (state->last_reg + 1) || idx != state->last_idx) {
       si_pm4_cmd_begin(state, opcode);
       state->pm4[state->ndw++] = reg | (idx << 28);
    }
 
    assert(reg <= UINT16_MAX);
    state->last_reg = reg;
+   state->last_idx = idx;
    state->pm4[state->ndw++] = val;
    si_pm4_cmd_end(state, false);
 }
diff --git a/src/gallium/drivers/radeonsi/si_pm4.h b/src/gallium/drivers/radeonsi/si_pm4.h
index 0add231..ac73a32 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_pm4.h
@@ -48,6 +48,7 @@ struct si_pm4_state {
    uint16_t last_pm4;
    uint16_t ndw;        /* number of dwords in pm4 */
    uint8_t last_opcode;
+   uint8_t last_idx;
 
    /* For shader states only */
    bool is_shader;