From: Ed Schouten <ed@nuxi.nl>
Date: Wed, 6 Apr 2016 18:21:07 +0000 (+0000)
Subject: Sort relocations by name and size.
X-Git-Tag: llvmorg-3.9.0-rc1~9831
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=39aca42df63f57fd57dd82532f8190ac2027e00e;p=platform%2Fupstream%2Fllvm.git

Sort relocations by name and size.

Approved by:	ruiu
Differential Revision:	http://reviews.llvm.org/D18835

llvm-svn: 265580
---

diff --git a/lld/ELF/Target.cpp b/lld/ELF/Target.cpp
index 39f478e..b5f5dd1 100644
--- a/lld/ELF/Target.cpp
+++ b/lld/ELF/Target.cpp
@@ -818,15 +818,15 @@ bool X86_64TargetInfo::isRelRelative(uint32_t Type) const {
   switch (Type) {
   default:
     return false;
-  case R_X86_64_GOTTPOFF:
-  case R_X86_64_TPOFF32:
   case R_X86_64_DTPOFF32:
   case R_X86_64_DTPOFF64:
+  case R_X86_64_GOTTPOFF:
   case R_X86_64_PC8:
   case R_X86_64_PC16:
   case R_X86_64_PC32:
   case R_X86_64_PC64:
   case R_X86_64_PLT32:
+  case R_X86_64_TPOFF32:
     return true;
   }
 }
@@ -1253,25 +1253,25 @@ bool AArch64TargetInfo::isRelRelative(uint32_t Type) const {
   switch (Type) {
   default:
     return false;
-  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
-  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
-  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
-  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
-  case R_AARCH64_PREL32:
+  case R_AARCH64_ADD_ABS_LO12_NC:
+  case R_AARCH64_ADR_GOT_PAGE:
   case R_AARCH64_ADR_PREL_LO21:
   case R_AARCH64_ADR_PREL_PG_HI21:
-  case R_AARCH64_ADR_GOT_PAGE:
+  case R_AARCH64_CALL26:
+  case R_AARCH64_CONDBR19:
+  case R_AARCH64_JUMP26:
   case R_AARCH64_LDST8_ABS_LO12_NC:
   case R_AARCH64_LDST16_ABS_LO12_NC:
   case R_AARCH64_LDST32_ABS_LO12_NC:
   case R_AARCH64_LDST64_ABS_LO12_NC:
   case R_AARCH64_LDST128_ABS_LO12_NC:
-  case R_AARCH64_ADD_ABS_LO12_NC:
-  case R_AARCH64_CALL26:
-  case R_AARCH64_JUMP26:
-  case R_AARCH64_CONDBR19:
-  case R_AARCH64_TSTBR14:
+  case R_AARCH64_PREL32:
   case R_AARCH64_PREL64:
+  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
+  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
+  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+  case R_AARCH64_TSTBR14:
     return true;
   }
 }