From: David Spickett <david.spickett@arm.com>
Date: Fri, 17 Jan 2020 14:45:56 +0000 (+0000)
Subject: [AArch64] Make AArch64 specific assembly directives case insensitive
X-Git-Tag: 2020.06-alpha~252^2~209
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=398dc06ad015627465be434fcd5ee2d55399f2bd;p=platform%2Fupstream%2Fllvm.git

[AArch64] Make AArch64 specific assembly directives case insensitive

Differential Revision: https://reviews.llvm.org/D72923
---

diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index be4c96022472..5c7697a8bbcc 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3771,7 +3771,7 @@ bool AArch64AsmParser::ParseInstruction(ParseInstructionInfo &Info,
 
   // First check for the AArch64-specific .req directive.
   if (Parser.getTok().is(AsmToken::Identifier) &&
-      Parser.getTok().getIdentifier() == ".req") {
+      Parser.getTok().getIdentifier().lower() == ".req") {
     parseDirectiveReq(Name, NameLoc);
     // We always return 'error' for this, as we're done with this
     // statement and don't need to match the 'instruction."
@@ -5024,7 +5024,7 @@ bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID) {
     getContext().getObjectFileInfo()->getObjectFileType();
   bool IsMachO = Format == MCObjectFileInfo::IsMachO;
 
-  StringRef IDVal = DirectiveID.getIdentifier();
+  auto IDVal = DirectiveID.getIdentifier().lower();
   SMLoc Loc = DirectiveID.getLoc();
   if (IDVal == ".arch")
     parseDirectiveArch(Loc);
diff --git a/llvm/test/MC/AArch64/directives-case_insensitive.s b/llvm/test/MC/AArch64/directives-case_insensitive.s
new file mode 100644
index 000000000000..be92e00cfad1
--- /dev/null
+++ b/llvm/test/MC/AArch64/directives-case_insensitive.s
@@ -0,0 +1,46 @@
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -filetype asm -o - %s 2>&1 | FileCheck %s
+
+.CPU generic+lse
+casa  w5, w7, [x20]
+// CHECK: casa  w5, w7, [x20]
+
+.ARCH_EXTENSION crc
+crc32cx w0, w1, x3
+// CHECK: crc32cx w0, w1, x3
+
+.ARCH armv8.4-a
+tlbi vmalle1os
+// CHECK: tlbi  vmalle1os
+
+.INST 0x5e104020
+// CHECK: .inst 0x5e104020
+
+.RELOC 0, R_AARCH64_NONE, 8
+// CHECK: .reloc 0, R_AARCH64_NONE, 8
+
+.HWORD 0x1234
+// CHECK: .hword  4660
+.WORD  0x12345678
+// CHECK: .word 305419896
+.DWORD 0x1234567812345678
+// CHECK: .xword  1311768465173141112
+.XWORD 0x1234567812345678
+// CHECK: .xword  1311768465173141112
+
+fred .REQ x5
+.UNREQ fred
+
+.CFI_STARTPROC
+.CFI_NEGATE_RA_STATE
+.CFI_B_KEY_FRAME
+.CFI_ENDPROC
+// CHECK: .cfi_startproc
+// CHECK: .cfi_negate_ra_state
+// CHECK: .cfi_b_key_frame
+// CHECK: .cfi_endproc
+
+.TLSDESCCALL var
+// CHECK: .tlsdesccall var
+
+.LTORG
+.POOL