From: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Date: Mon, 19 Jul 2010 08:20:59 +0000 (+0000)
Subject: sourcebuild.texi (Effective-Target Keywords): Document sse_runtime, sse2_runtime.
X-Git-Tag: upstream/12.2.0~91437
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=39354b3b991ec0b77d9137c64eea9551ff0ec6f7;p=platform%2Fupstream%2Fgcc.git

sourcebuild.texi (Effective-Target Keywords): Document sse_runtime, sse2_runtime.

	gcc:
	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	sse_runtime, sse2_runtime.

	gcc/testsuite:
	* lib/target-supports.exp (check_sse_os_support_available): New
	proc.
	(check_sse_hw_available): New proc.
	(check_effective_target_sse_runtime): New proc.
	(check_effective_target_sse2_runtime): New proc.
	* lib/fortran-torture.exp (get-fortran-torture-options): Only add
	-msse2 if check_sse_os_support_available.
	* g++.dg/vect/vect.exp: Only run -msse2 tests if
	check_sse_os_support_available.
	* gcc.dg/vect/vect.exp: Likewise.
	* gfortran.dg/vect/vect.exp: Likewise.
	* gcc.target/i386/sol2-check: Renamed to ...
	* gcc.target/i386/sse-os-support.h: ... this.
	(sol2_check): Renamed to ...
	(sse_os_support): ... this.
	Only test movss with xmm registers.
	* gcc.target/i386/sse-check.h: Reflect new header and function names.
	Removed ILL_INSN, ILL_INSN_LEN.
	* gcc.target/i386/sse2-check.h: Likewise.
	* gcc.target/i386/sse3-check.h: Likewise.
	* gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
	Removed cpuid.h, __get_cpuid test.
	* g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
	Removed cpuid.h, __get_cpuid test.
	* g++.dg/other/pr40446.C: Likewise.
	* gcc.dg/compat/union-m128-1_main.c: Likewise.
	* gcc.dg/compat/vector-1a_main.c: Likewise.
	* gcc.dg/compat/vector-2a_main.c: Likewise.
	* gcc.dg/pr36584.c: Likewise.
	* gcc.dg/pr37544.c: Likewise.
	* gcc.dg/torture/pr16104-1.c: Likewise.
	* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
	* gcc.dg/torture/stackalign/alloca-3.c: Likewise.
	* gcc.dg/torture/stackalign/push-1.c: Likewise.
	* gcc.dg/torture/stackalign/vararg-3.c: Likewise.
	* gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
	* gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
	sse2_runtime.
	* gcc.dg/torture/pr35771-2.c: Likewise.
	* gcc.dg/torture/pr35771-3.c: Likewise.
	* gcc.target/i386/pr39315-2.c: Likewise.
	* gcc.target/i386/pr39315-4.c: Likewise.
	* gcc.target/i386/vperm-v2df.c: Likewise.
	* gcc.target/i386/vperm-v2di.c: Likewise.
	* gcc.target/i386/vperm-v4si-1.c: Likewise.
	* gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
	sse_runtime.

From-SVN: r162295
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a789ecd..0482650 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2010-07-19  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* doc/sourcebuild.texi (Effective-Target Keywords): Document
+	sse_runtime, sse2_runtime.
+
 2010-07-18  Richard Sandiford  <rdsandiford@googlemail.com>
 
 	* config/mips/mips.c (mips16_build_call_stub): Zero-extend the
@@ -11,22 +16,6 @@
 	* config/pa/pa.h (CONSTANT_ALIGNMENT): Align strings to BITS_PER_WORD
 	on all targets.
 
-Index: config/pa/pa.h
-===================================================================
---- config/pa/pa.h	(revision 162277)
-+++ config/pa/pa.h	(working copy)
-@@ -316,8 +316,9 @@
- #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
- 
- /* Get around hp-ux assembler bug, and make strcpy of constants fast.  */
--#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
--  ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
-+#define CONSTANT_ALIGNMENT(EXP, ALIGN)		\
-+  (TREE_CODE (EXP) == STRING_CST		\
-+   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
- 
- /* Make arrays of chars word-aligned for the same reasons.  */
- #define DATA_ALIGNMENT(TYPE, ALIGN)		\
 2010-07-17  Bernd Schmidt  <bernds@codesourcery.com>
 
 	PR target/42235
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 191e425..33f2389 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1607,9 +1607,15 @@ Target supports FPU instructions.
 @item sse
 Target supports compiling @code{sse} instructions.
 
+@item sse_runtime
+Target supports the execution of @code{sse} instructions.
+
 @item sse2
 Target supports compiling @code{sse2} instructions.
 
+@item sse2_runtime
+Target supports the execution of @code{sse2} instructions.
+
 @item sync_char_short
 Target supports atomic operations on @code{char} and @code{short}.
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 73fb7b7..100d605 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,53 @@
+2010-07-19  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* lib/target-supports.exp (check_sse_os_support_available): New
+	proc.
+	(check_sse_hw_available): New proc.
+	(check_effective_target_sse_runtime): New proc.
+	(check_effective_target_sse2_runtime): New proc.
+	* lib/fortran-torture.exp (get-fortran-torture-options): Only add
+	-msse2 if check_sse_os_support_available.
+	* g++.dg/vect/vect.exp: Only run -msse2 tests if
+	check_sse_os_support_available.
+	* gcc.dg/vect/vect.exp: Likewise.
+	* gfortran.dg/vect/vect.exp: Likewise.
+	* gcc.target/i386/sol2-check: Renamed to ...
+	* gcc.target/i386/sse-os-support.h: ... this.
+	(sol2_check): Renamed to ...
+	(sse_os_support): ... this.
+	Only test movss with xmm registers.
+	* gcc.target/i386/sse-check.h: Reflect new header and function names.
+	Removed ILL_INSN, ILL_INSN_LEN.
+	* gcc.target/i386/sse2-check.h: Likewise.
+	* gcc.target/i386/sse3-check.h: Likewise.
+	* gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
+	Removed cpuid.h, __get_cpuid test.
+	* g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
+	Removed cpuid.h, __get_cpuid test.
+	* g++.dg/other/pr40446.C: Likewise.
+	* gcc.dg/compat/union-m128-1_main.c: Likewise.
+	* gcc.dg/compat/vector-1a_main.c: Likewise.
+	* gcc.dg/compat/vector-2a_main.c: Likewise.
+	* gcc.dg/pr36584.c: Likewise.
+	* gcc.dg/pr37544.c: Likewise.
+	* gcc.dg/torture/pr16104-1.c: Likewise.
+	* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
+	* gcc.dg/torture/stackalign/alloca-3.c: Likewise.
+	* gcc.dg/torture/stackalign/push-1.c: Likewise.
+	* gcc.dg/torture/stackalign/vararg-3.c: Likewise.
+	* gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
+	* gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
+	sse2_runtime.
+	* gcc.dg/torture/pr35771-2.c: Likewise.
+	* gcc.dg/torture/pr35771-3.c: Likewise.
+	* gcc.target/i386/pr39315-2.c: Likewise.
+	* gcc.target/i386/pr39315-4.c: Likewise.
+	* gcc.target/i386/vperm-v2df.c: Likewise.
+	* gcc.target/i386/vperm-v2di.c: Likewise.
+	* gcc.target/i386/vperm-v4si-1.c: Likewise.
+	* gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
+	sse_runtime.
+
 2010-07-19  Paul Thomas  <pault@gcc.gnu.org>
 
 	PR fortran/44353
diff --git a/gcc/testsuite/g++.dg/other/i386-1.C b/gcc/testsuite/g++.dg/other/i386-1.C
index 5a91e60..5104868 100644
--- a/gcc/testsuite/g++.dg/other/i386-1.C
+++ b/gcc/testsuite/g++.dg/other/i386-1.C
@@ -1,11 +1,10 @@
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <xmmintrin.h>
 
-#include "cpuid.h"
-
 static void
 sse2_test (void)
 {
@@ -25,14 +24,6 @@ sse2_test (void)
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    sse2_test ();
-
+  sse2_test ();
   return 0;
 }
diff --git a/gcc/testsuite/g++.dg/other/pr40446.C b/gcc/testsuite/g++.dg/other/pr40446.C
index dd0aa48..b4be0d0 100644
--- a/gcc/testsuite/g++.dg/other/pr40446.C
+++ b/gcc/testsuite/g++.dg/other/pr40446.C
@@ -2,9 +2,9 @@
 // { dg-do run { target i?86-*-* x86_64-*-* } }
 // { dg-options "-O1 -msse2" }
 // { dg-require-effective-target sse2 }
+// { dg-require-effective-target sse2_runtime }
 
 #include <emmintrin.h>
-#include "cpuid.h"
 
 extern "C" void abort ();
 
@@ -34,14 +34,6 @@ sse2_test ()
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    sse2_test ();
-
+  sse2_test ();
   return 0;
 }
diff --git a/gcc/testsuite/g++.dg/vect/vect.exp b/gcc/testsuite/g++.dg/vect/vect.exp
index aa45066..18e8355 100644
--- a/gcc/testsuite/g++.dg/vect/vect.exp
+++ b/gcc/testsuite/g++.dg/vect/vect.exp
@@ -79,7 +79,7 @@ if  [istarget "powerpc-*paired*"]  {
 	return
     }
     lappend DEFAULT_VECTCFLAGS "-msse2"
-    if [check_sse2_hw_available] {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
 	set dg-do-what-default run
     } else {
 	set dg-do-what-default compile
diff --git a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
index cfd081d..602acf8 100644
--- a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
+++ b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
@@ -1,8 +1,7 @@
 /* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
 /* { dg-options "-O" } */
 /* { dg-require-effective-target sse2 } */
-
-#include "cpuid.h"
+/* { dg-require-effective-target sse2_runtime } */
 
 /* Test function argument passing.  PR target/15301.  */
 
@@ -12,14 +11,6 @@ extern void exit (int);
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE vector test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    union_m128_1_x ();
-
+  union_m128_1_x ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1a_main.c b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c
index c5acc35..11b4511 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-1a_main.c
+++ b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c
@@ -1,12 +1,11 @@
 /* { dg-skip-if "test SSE2 vector" { ! { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 /* Test compatibility of vector types: layout between separately-compiled
    modules, parameter passing, and function return.  This test uses
    vectors of integer values.  */
 
-#include "cpuid.h"
-
 extern void vector_1_x (void);
 extern void exit (int);
 int fails;
@@ -14,14 +13,6 @@ int fails;
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE vector test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    vector_1_x ();
-
+  vector_1_x ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/compat/vector-2a_main.c b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c
index 164c4b2..8457e5a 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-2a_main.c
+++ b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c
@@ -1,12 +1,11 @@
 /* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 /* Test compatibility of vector types: layout between separately-compiled
    modules, parameter passing, and function return.  This test uses
    vectors of floating points values.  */
 
-#include "cpuid.h"
-
 extern void vector_2_x (void);
 extern void exit (int);
 int fails;
@@ -14,14 +13,6 @@ int fails;
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE vector test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    vector_2_x ();
-
+  vector_2_x ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/pr36584.c b/gcc/testsuite/gcc.dg/pr36584.c
index a39eb57..2af71ae 100644
--- a/gcc/testsuite/gcc.dg/pr36584.c
+++ b/gcc/testsuite/gcc.dg/pr36584.c
@@ -2,10 +2,7 @@
 /* { dg-options "-O2 -lm" } */
 /* { dg-options "-O2 -msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-require-effective-target sse2 { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
-
-#ifdef __i386__
-#include "cpuid.h"
-#endif
+/* { dg-require-effective-target sse2_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 extern double fabs (double);
 extern void abort (void);
@@ -263,16 +260,6 @@ main ()
   double roots[7];
   int nroots;
 
-#ifdef __i386__
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  if (!(edx & bit_SSE2))
-    return 0;
-#endif
-
   nroots = sbisect (6, sseq, 0.0, 10000000.0, 5, 1, roots);
   if (nroots != 4)
     abort ();
diff --git a/gcc/testsuite/gcc.dg/pr37544.c b/gcc/testsuite/gcc.dg/pr37544.c
index efca1db..dec321b 100644
--- a/gcc/testsuite/gcc.dg/pr37544.c
+++ b/gcc/testsuite/gcc.dg/pr37544.c
@@ -2,10 +2,7 @@
 /* { dg-options "-O2" } */
 /* { dg-options "-O2 -msse2 -mtune=core2 -mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
-
-#ifdef __i386__
-#include "cpuid.h"
-#endif
+/* { dg-require-effective-target sse2_runtime { target { i?86-*-* x86_64-*-* } } } */
 
 extern void abort (void);
 
@@ -16,17 +13,6 @@ int main(void)
 
   int i;
 
-#ifdef __i386__
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (!(edx & bit_SSE2))
-    return 0;
-#endif
-
   for (i = 0; i < 1000; i++)
     arr[i] = 4294967296.0 + (double)i;
 
diff --git a/gcc/testsuite/gcc.dg/pr40550.c b/gcc/testsuite/gcc.dg/pr40550.c
index 3dd11eb..2e47729 100644
--- a/gcc/testsuite/gcc.dg/pr40550.c
+++ b/gcc/testsuite/gcc.dg/pr40550.c
@@ -1,10 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
-
-#ifdef __i386__
-#include "cpuid.h"
-#endif
+/* { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 typedef float v2sf __attribute__ ((vector_size (2 * sizeof(float))));
 
@@ -18,18 +15,6 @@ static void test (void)
 
 int main ()
 {
-
-#ifdef __i386__
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  if (!(edx & bit_SSE))
-    return 0;
-#endif
-
   test ();
-
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/torture/pr16104-1.c b/gcc/testsuite/gcc.dg/torture/pr16104-1.c
index 3eb4059..d4aed81 100644
--- a/gcc/testsuite/gcc.dg/torture/pr16104-1.c
+++ b/gcc/testsuite/gcc.dg/torture/pr16104-1.c
@@ -2,8 +2,7 @@
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
-
-#include "cpuid.h"
+/* { dg-require-effective-target sse2_runtime } */
 
 extern void abort (void);
 
@@ -76,14 +75,6 @@ do_test (void)
 int
 main (void)
 {
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    do_test ();
-
+  do_test ();
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/torture/pr35771-1.c b/gcc/testsuite/gcc.dg/torture/pr35771-1.c
index 8def464..4e95700 100644
--- a/gcc/testsuite/gcc.dg/torture/pr35771-1.c
+++ b/gcc/testsuite/gcc.dg/torture/pr35771-1.c
@@ -1,6 +1,7 @@
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
 
diff --git a/gcc/testsuite/gcc.dg/torture/pr35771-2.c b/gcc/testsuite/gcc.dg/torture/pr35771-2.c
index 3d6add1..ae5bb00 100644
--- a/gcc/testsuite/gcc.dg/torture/pr35771-2.c
+++ b/gcc/testsuite/gcc.dg/torture/pr35771-2.c
@@ -1,6 +1,7 @@
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
 
diff --git a/gcc/testsuite/gcc.dg/torture/pr35771-3.c b/gcc/testsuite/gcc.dg/torture/pr35771-3.c
index 9a69b21..556f786 100644
--- a/gcc/testsuite/gcc.dg/torture/pr35771-3.c
+++ b/gcc/testsuite/gcc.dg/torture/pr35771-3.c
@@ -1,6 +1,7 @@
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
 
diff --git a/gcc/testsuite/gcc.dg/torture/pr35771.h b/gcc/testsuite/gcc.dg/torture/pr35771.h
index 01c2487..7b921c4 100644
--- a/gcc/testsuite/gcc.dg/torture/pr35771.h
+++ b/gcc/testsuite/gcc.dg/torture/pr35771.h
@@ -1,7 +1,5 @@
 typedef TYPE __attribute__((aligned(1))) unaligned;
 
-#include "cpuid.h"
-
 extern void abort (void);
 
 
@@ -27,14 +25,6 @@ do_test (void)
 int
 main (void)
 {
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    do_test ();
-
+  do_test ();
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
index cbbb9d0..54232bf 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
@@ -2,9 +2,9 @@
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <emmintrin.h>
-#include "cpuid.h"
 #include "check.h"
 
 #ifndef ALIGNMENT
@@ -44,14 +44,7 @@ int
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    foo (x, x, x, 5);
+  foo (x, x, x, 5);
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c
index ffe52f2..8a91121 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c
@@ -2,9 +2,9 @@
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <emmintrin.h>
-#include "cpuid.h"
 #include "check.h"
 
 #ifndef ALIGNMENT
@@ -44,14 +44,7 @@ int
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    foo (x, x, x, x, 5);
+  foo (x, x, x, x, 5);
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
index c020d73..c58d1ec 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
@@ -2,9 +2,9 @@
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2 -mpreferred-stack-boundary=2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <emmintrin.h>
-#include "cpuid.h"
 
 typedef __PTRDIFF_TYPE__ ptrdiff_t;
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
@@ -42,19 +42,11 @@ int
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
 
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    {
-      foo (x, x, x, x, 5);
+  foo (x, x, x, x, 5);
 
-      if (__builtin_memcmp (&r, &x, sizeof (r)))
-	abort ();
-    }
+  if (__builtin_memcmp (&r, &x, sizeof (r)))
+    abort ();
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c
index 3e34cf1..734cf71 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c
@@ -2,10 +2,10 @@
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <stdarg.h>
 #include <emmintrin.h>
-#include "cpuid.h"
 #include "check.h"
 
 #ifndef ALIGNMENT
@@ -72,14 +72,8 @@ int
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    foo ("foo", 5, 5.0, x);
+
+  foo ("foo", 5, 5.0, x);
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.dg/vect/vect.exp b/gcc/testsuite/gcc.dg/vect/vect.exp
index 98477c4..eecb13a 100644
--- a/gcc/testsuite/gcc.dg/vect/vect.exp
+++ b/gcc/testsuite/gcc.dg/vect/vect.exp
@@ -71,7 +71,7 @@ if  [istarget "powerpc-*paired*"]  {
 	return
     }
     lappend DEFAULT_VECTCFLAGS "-msse2"
-    if [check_sse2_hw_available] {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
 	set dg-do-what-default run
     } else {
 	set dg-do-what-default compile
diff --git a/gcc/testsuite/gcc.target/i386/pr39315-2.c b/gcc/testsuite/gcc.target/i386/pr39315-2.c
index 5363e97..ee74def 100644
--- a/gcc/testsuite/gcc.target/i386/pr39315-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr39315-2.c
@@ -2,6 +2,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2 -mtune=generic" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 /* { dg-additional-sources pr39315-check.c } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16)));
diff --git a/gcc/testsuite/gcc.target/i386/pr39315-4.c b/gcc/testsuite/gcc.target/i386/pr39315-4.c
index 4a62a1d..107933f 100644
--- a/gcc/testsuite/gcc.target/i386/pr39315-4.c
+++ b/gcc/testsuite/gcc.target/i386/pr39315-4.c
@@ -2,6 +2,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2 -mtune=generic" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 /* { dg-additional-sources pr39315-check.c } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16)));
diff --git a/gcc/testsuite/gcc.target/i386/sse-check.h b/gcc/testsuite/gcc.target/i386/sse-check.h
index d6c92a3..11b71bc 100644
--- a/gcc/testsuite/gcc.target/i386/sse-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse-check.h
@@ -1,13 +1,7 @@
 #include <stdlib.h>
 #include "m128-check.h"
-
 #include "cpuid.h"
-
-/* We need a single SSE instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("movss %xmm2,%xmm1")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse_test (void);
 
@@ -27,7 +21,7 @@ main ()
     return 0;
 
   /* Run SSE test only if host has SSE support.  */
-  if ((edx & bit_SSE) && sol2_check ())
+  if ((edx & bit_SSE) && sse_os_support ())
     do_test ();
 
   return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sol2-check.h b/gcc/testsuite/gcc.target/i386/sse-os-support.h
similarity index 62%
rename from gcc/testsuite/gcc.target/i386/sol2-check.h
rename to gcc/testsuite/gcc.target/i386/sse-os-support.h
index 25a915e..a2b4e2d 100644
--- a/gcc/testsuite/gcc.target/i386/sol2-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse-os-support.h
@@ -14,18 +14,23 @@ sigill_hdlr (int sig __attribute((unused)),
   sigill_caught = 1;
   /* Set PC to the instruction after the faulting one to skip over it,
      otherwise we enter an infinite loop.  */
-  ucp->uc_mcontext.gregs[EIP] += ILL_INSN_LEN;
+  ucp->uc_mcontext.gregs[EIP] += 4;
   setcontext (ucp);
 }
 #endif
 
-/* Solaris 2 before Solaris 9 4/04 cannot execute SSE/SSE2 instructions
-   even if the CPU supports them.  Programs receive SIGILL instead, so
-   check for that at runtime.  */
+/* Check if the OS supports executing SSE instructions.  This function is
+   only used in sse-check.h, sse2-check.h, and sse3-check.h so far since
+   Solaris 8 and 9 won't run on newer CPUs anyway.  */
+
 static int
-sol2_check (void)
+sse_os_support (void)
 {
 #if defined(__sun__) && defined(__svr4__)
+  /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions
+     even if the CPU supports them.  Programs receive SIGILL instead, so
+     check for that at runtime.  */
+
   struct sigaction act, oact;
 
   act.sa_handler = sigill_hdlr;
@@ -34,7 +39,9 @@ sol2_check (void)
   act.sa_flags = SA_SIGINFO;
   sigaction (SIGILL, &act, &oact);
 
-  ILL_INSN;
+  /* We need a single SSE instruction here so the handler can safely skip
+     over it.  */
+  __asm__ volatile ("movss %xmm2,%xmm1");
 
   sigaction (SIGILL, &oact, NULL);
 
diff --git a/gcc/testsuite/gcc.target/i386/sse2-check.h b/gcc/testsuite/gcc.target/i386/sse2-check.h
index 7e91192..fd4a6ce 100644
--- a/gcc/testsuite/gcc.target/i386/sse2-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse2-check.h
@@ -1,12 +1,7 @@
 #include <stdlib.h>
 #include "cpuid.h"
 #include "m128-check.h"
-
-/* We need a single SSE2 instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("unpcklpd %xmm0,%xmm2")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse2_test (void);
 
@@ -26,7 +21,7 @@ main ()
     return 0;
 
   /* Run SSE2 test only if host has SSE2 support.  */
-  if ((edx & bit_SSE2) && sol2_check ())
+  if ((edx & bit_SSE2) && sse_os_support ())
     do_test ();
 
   return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sse3-check.h b/gcc/testsuite/gcc.target/i386/sse3-check.h
index c7b1896..5a0a0b1 100644
--- a/gcc/testsuite/gcc.target/i386/sse3-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse3-check.h
@@ -1,13 +1,7 @@
 #include <stdio.h>
 #include <stdlib.h>
-
 #include "cpuid.h"
-
-/* We need a single SSE3 instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("movddup %xmm1,%xmm2")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse3_test (void);
 
@@ -27,7 +21,7 @@ main ()
     return 0;
  
   /* Run SSE3 test only if host has SSE3 support.  */
-  if ((ecx & bit_SSE3) && sol2_check ())
+  if ((ecx & bit_SSE3) && sse_os_support ())
     do_test ();
 
   return 0;
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2df.c b/gcc/testsuite/gcc.target/i386/vperm-v2df.c
index d039463..1a237f04 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v2df.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v2df.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2di.c b/gcc/testsuite/gcc.target/i386/vperm-v2di.c
index 940de68..b587d90 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v2di.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v2di.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
index b9fc9b1..d8cb9e6 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
@@ -1,5 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse" } */
+/* { dg-require-effective-target sse } */
+/* { dg-require-effective-target sse_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
index 93c25c6..3c2717d 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gfortran.dg/vect/vect.exp b/gcc/testsuite/gfortran.dg/vect/vect.exp
index 39a1f9d..2a09df5 100644
--- a/gcc/testsuite/gfortran.dg/vect/vect.exp
+++ b/gcc/testsuite/gfortran.dg/vect/vect.exp
@@ -72,7 +72,7 @@ if  [istarget "powerpc-*paired*"]  {
 	return
     }
     lappend DEFAULT_VECTCFLAGS "-msse2"
-    if [check_sse2_hw_available] {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
 	set dg-do-what-default run
     } else {
 	set dg-do-what-default compile
diff --git a/gcc/testsuite/lib/fortran-torture.exp b/gcc/testsuite/lib/fortran-torture.exp
index 72ce9d6..cd24ace 100644
--- a/gcc/testsuite/lib/fortran-torture.exp
+++ b/gcc/testsuite/lib/fortran-torture.exp
@@ -46,7 +46,8 @@ proc get-fortran-torture-options { } {
 	set test_tree_vectorize 1
     } elseif { ( [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] )
 	       && [check_effective_target_sse2]
-	       && [check_sse2_hw_available] } {
+	       && [check_sse2_hw_available]
+	       && [check_sse_os_support_available] } {
 	lappend vectorizer_options "-msse2"
 	set test_tree_vectorize 1
     } elseif { [istarget "mips*-*-*"]
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index bb28a77..0378f80 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -910,6 +910,53 @@ proc check_750cl_hw_available { } {
     }]
 }
 
+# Return 1 if the target OS supports running SSE executables, 0
+# otherwise.  Cache the result.
+
+proc check_sse_os_support_available { } {
+    return [check_cached_effective_target sse_os_support_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} elseif { [istarget i?86-*-solaris2*] } {
+	    # The Solaris 2 kernel doesn't save and restore SSE registers
+	    # before Solaris 9 4/04.  Before that, executables die with SIGILL.
+	    check_runtime_nocache sse_os_support_available {
+		int main ()
+		{
+		    __asm__ volatile ("movss %xmm2,%xmm1");
+		    return 0;
+		}
+	    } "-msse"
+	} else {
+	    expr 1
+	}
+    }]
+}
+
+# Return 1 if the target supports executing SSE instructions, 0
+# otherwise.  Cache the result.
+
+proc check_sse_hw_available { } {
+    return [check_cached_effective_target sse_hw_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} else {
+	    check_runtime_nocache sse_hw_available {
+		#include "cpuid.h"
+		int main ()
+		{
+		  unsigned int eax, ebx, ecx, edx = 0;
+		  if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+		    return !(edx & bit_SSE);
+		  return 1;
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports executing SSE2 instructions, 0
 # otherwise.  Cache the result.
 
@@ -933,6 +980,26 @@ proc check_sse2_hw_available { } {
     }]
 }
 
+# Return 1 if the target supports running SSE executables, 0 otherwise.
+
+proc check_effective_target_sse_runtime { } {
+    if { [check_sse_hw_available] && [check_sse_os_support_available] } {
+	return 1
+    } else {
+	return 0
+    }
+}
+
+# Return 1 if the target supports running SSE2 executables, 0 otherwise.
+
+proc check_effective_target_sse2_runtime { } {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
+	return 1
+    } else {
+	return 0
+    }
+}
+
 # Return 1 if the target supports executing VSX instructions, 0
 # otherwise.  Cache the result.