From: sgjesse@chromium.org Date: Wed, 4 Nov 2009 15:24:11 +0000 (+0000) Subject: Fix ARM debug build X-Git-Tag: upstream/4.7.83~23010 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=392ee5d1a89ec563f9316312472e11495ae7e4cf;p=platform%2Fupstream%2Fv8.git Fix ARM debug build TBR=fschneider@chromium.org git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3216 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- diff --git a/src/arm/fast-codegen-arm.cc b/src/arm/fast-codegen-arm.cc index 6de819493..cca9471df 100644 --- a/src/arm/fast-codegen-arm.cc +++ b/src/arm/fast-codegen-arm.cc @@ -142,14 +142,14 @@ void FastCodeGenerator::EmitReturnSequence(int position) { __ add(sp, sp, Operand(sp_delta)); __ Jump(lr); - // Check that the size of the code used for returning matches what is - // expected by the debugger. The add instruction above is an addressing - // mode 1 instruction where there are restrictions on which immediate values - // can be encoded in the instruction and which immediate values requires - // use of an additional instruction for moving the immediate to a temporary - // register. - ASSERT_EQ(expected_return_sequence_length, - masm_->InstructionsGeneratedSince(&check_exit_codesize)); + // Check that the size of the code used for returning matches what is + // expected by the debugger. The add instruction above is an addressing + // mode 1 instruction where there are restrictions on which immediate values + // can be encoded in the instruction and which immediate values requires + // use of an additional instruction for moving the immediate to a temporary + // register. + ASSERT_EQ(return_sequence_length, + masm_->InstructionsGeneratedSince(&check_exit_codesize)); } }