From: Steve Ellcey <sje@cup.hp.com>
Date: Mon, 9 Dec 2002 18:07:58 +0000 (+0000)
Subject: hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove definition
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3870df966ed749909d751477bb30a9c2d551d507;p=platform%2Fupstream%2Fgcc.git

hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove definition

	* config/ia64/hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove
	definition
	(MEMBER_TYPE_FORCES_BLK): Move.
	* config/ia64/ia64.c (ia64_function_arg): Use PARALLEL to pass
	aggregate arguments.
	(ia64_function_value): Use PARALLEL to return aggregate values.

From-SVN: r59963
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3cb1aa8..cef27a9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,14 @@
 2002-12-09  Steve Ellcey  <sje@cup.hp.com>
 
+	* config/ia64/hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove
+	definition
+	(MEMBER_TYPE_FORCES_BLK): Move.
+	* config/ia64/ia64.c (ia64_function_arg): Use PARALLEL to pass
+	aggregate arguments.
+	(ia64_function_value): Use PARALLEL to return aggregate values.
+
+2002-12-09  Steve Ellcey  <sje@cup.hp.com>
+
 	* doc/tm.texi (FUNCTION_ARG_REG_LITTLE_ENDIAN): Remove definition.
 	* defaults.h (FUNCTION_ARG_REG_LITTLE_ENDIAN): Remove definition.
 	* calls.c (store_unaligned_arguments_into_pseudos) Remove
diff --git a/gcc/config/ia64/hpux.h b/gcc/config/ia64/hpux.h
index a07fe46..1e6f699 100644
--- a/gcc/config/ia64/hpux.h
+++ b/gcc/config/ia64/hpux.h
@@ -108,9 +108,9 @@ do {							\
    field to be treated as structures and not as the type of their
    field.  Without this a structure with a single char will be
    returned just like a char variable and that is wrong on HP-UX
-   IA64.  TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN triggers the special
-   structure handling, this macro simply ensures that single field
-   structures are always treated like structures.  */
+   IA64.  */
+
+#define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) (TREE_CODE (TREE_TYPE (FIELD)) != REAL_TYPE || (MODE == TFmode && !INTEL_EXTENDED_IEEE_FORMAT))
 
 /* ASM_OUTPUT_EXTERNAL_LIBCALL defaults to just a globalize_label call,
    but that doesn't put out the @function type information which causes
@@ -123,18 +123,6 @@ do {								\
   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, XSTR (FUN, 0), "function");	\
 } while (0)
 
-#define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) (TREE_CODE (TREE_TYPE (FIELD)) != REAL_TYPE || (MODE == TFmode && !INTEL_EXTENDED_IEEE_FORMAT))
-
-/* Override the setting of FUNCTION_ARG_REG_LITTLE_ENDIAN in
-   defaults.h.  Setting this to true means that we are not passing
-   structures in registers in the "normal" big-endian way.  See
-   See section 8.5 of the "Itanium Software Conventions and Runtime
-   Architecture", specifically Table 8-1 and the explanation of Byte 0
-   alignment and LSB alignment and a description of how structures
-   are passed.  */
-
-#define FUNCTION_ARG_REG_LITTLE_ENDIAN 1
-
 #undef FUNCTION_ARG_PADDING
 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
 	ia64_hpux_function_arg_padding ((MODE), (TYPE))
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index a8b6a8e..daddb86 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -3309,7 +3309,25 @@ ia64_function_arg (cum, mode, type, named, incoming)
      happen when we have a SFmode HFA.  */
   else if (((mode == TFmode) && ! INTEL_EXTENDED_IEEE_FORMAT)
           || (! FLOAT_MODE_P (mode) || cum->fp_regs == MAX_ARGUMENT_SLOTS))
-    return gen_rtx_REG (mode, basereg + cum->words + offset);
+    {
+      int byte_size = ((mode == BLKmode)
+                       ? int_size_in_bytes (type) : GET_MODE_SIZE (mode));
+      if (BYTES_BIG_ENDIAN
+	&& (mode == BLKmode || (type && AGGREGATE_TYPE_P (type)))
+	&& byte_size < UNITS_PER_WORD
+	&& byte_size > 0)
+	{
+	  rtx gr_reg = gen_rtx_EXPR_LIST (VOIDmode,
+					  gen_rtx_REG (DImode,
+						       (basereg + cum->words
+							+ offset)),
+					  const0_rtx);
+	  return gen_rtx_PARALLEL (mode, gen_rtvec (1, gr_reg));
+	}
+      else
+	return gen_rtx_REG (mode, basereg + cum->words + offset);
+
+    }
 
   /* If there is a prototype, then FP values go in a FR register when
      named, and in a GR registeer when unnamed.  */
@@ -3596,7 +3614,30 @@ ia64_function_value (valtype, func)
            ((mode != TFmode) || INTEL_EXTENDED_IEEE_FORMAT))
     return gen_rtx_REG (mode, FR_ARG_FIRST);
   else
-    return gen_rtx_REG (mode, GR_RET_FIRST);
+    {
+      if (BYTES_BIG_ENDIAN
+	  && (mode == BLKmode || (valtype && AGGREGATE_TYPE_P (valtype))))
+	{
+	  rtx loc[8];
+	  int offset;
+	  int bytesize;
+	  int i;
+
+	  offset = 0;
+	  bytesize = int_size_in_bytes (valtype);
+	  for (i = 0; offset < bytesize; i++)
+	    {
+	      loc[i] = gen_rtx_EXPR_LIST (VOIDmode,
+					  gen_rtx_REG (DImode,
+						       GR_RET_FIRST + i),
+					  GEN_INT (offset));
+	      offset += UNITS_PER_WORD;
+	    }
+	  return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
+	}
+      else
+	return gen_rtx_REG (mode, GR_RET_FIRST);
+    }
 }
 
 /* Print a memory address as an operand to reference that memory location.  */