From: Nanley Chery <nanley.g.chery@intel.com>
Date: Wed, 28 Sep 2016 22:51:35 +0000 (-0700)
Subject: anv/cmd_buffer: Manage Anv state around HZ op emission
X-Git-Tag: upstream/17.1.0~4585
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=37c07d64b4d52e7053c6228dfaedbb1fbee74abf;p=platform%2Fupstream%2Fmesa.git

anv/cmd_buffer: Manage Anv state around HZ op emission

Move the assignment to a less surprising location.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
---

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 0b1d5bf..c04dc24 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -455,9 +455,6 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
          hzp.FullSurfaceDepthandStencilClear = full_surface_op;
          hzp.StencilClearValue =
             cmd_state->attachments[ds].clear_value.depthStencil.stencil & 0xff;
-
-         /* Mark aspects as cleared */
-         cmd_state->attachments[ds].pending_clear_aspects = 0;
          break;
       case BLORP_HIZ_OP_DEPTH_RESOLVE:
          hzp.DepthBufferResolveEnable = true;
@@ -506,11 +503,16 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
 
    anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_HZ_OP), hzp);
 
-   if (!full_surface_op && op == BLORP_HIZ_OP_DEPTH_CLEAR) {
-      anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
-         pc.DepthStallEnable = true;
-         pc.DepthCacheFlushEnable = true;
+   if (op == BLORP_HIZ_OP_DEPTH_CLEAR) {
+      if (!full_surface_op) {
+         anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
+            pc.DepthStallEnable = true;
+            pc.DepthCacheFlushEnable = true;
+         }
       }
+
+      /* Mark aspects as cleared */
+      cmd_state->attachments[ds].pending_clear_aspects = 0;
    }
 }