From: Jakub Jelinek Date: Tue, 6 Apr 2010 18:41:25 +0000 (+0200) Subject: re PR target/43667 (ICE with __builtin_ia32_vpermil2p* and -mavx) X-Git-Tag: upstream/12.2.0~93919 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=377949813aecca7f8c1ede0c28d3de708eb5d06a;p=platform%2Fupstream%2Fgcc.git re PR target/43667 (ICE with __builtin_ia32_vpermil2p* and -mavx) PR target/43667 * config/i386/i386.c (bdesc_multi_arg): Use OPTION_MASK_ISA_XOP instead of OPTION_MASK_ISA_AVX for __builtin_ia32_vpermil2p*. (ix86_expand_args_builtin): Use V*_FTYPE_* enum codes instead of MULTI_* defines for 4 argument vpermil2p* builtins. From-SVN: r158015 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a958473..0d1fc70 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2010-04-06 Jakub Jelinek + + PR target/43667 + * config/i386/i386.c (bdesc_multi_arg): Use OPTION_MASK_ISA_XOP + instead of OPTION_MASK_ISA_AVX for __builtin_ia32_vpermil2p*. + (ix86_expand_args_builtin): Use V*_FTYPE_* enum codes instead of + MULTI_* defines for 4 argument vpermil2p* builtins. + 2010-04-06 Uros Bizjak * config/i386/i386-protos.h (x86_maybe_negate_const_int): Declare. @@ -13,7 +21,6 @@ * config/i386/sync.md (sync_add): Use x86_maybe_negate_const_int to output insn mnemonic. - 2010-04-06 Jan Hubicka PR tree-optimization/42906 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d498b47..c945a54 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -22472,10 +22472,10 @@ static const struct builtin_description bdesc_multi_arg[] = { OPTION_MASK_ISA_XOP, CODE_FOR_xop_pcom_tfv4si3, "__builtin_ia32_vpcomtrueud", IX86_BUILTIN_VPCOMTRUEUD, (enum rtx_code) PCOM_TRUE, (int)MULTI_ARG_2_SI_TF }, { OPTION_MASK_ISA_XOP, CODE_FOR_xop_pcom_tfv2di3, "__builtin_ia32_vpcomtrueuq", IX86_BUILTIN_VPCOMTRUEUQ, (enum rtx_code) PCOM_TRUE, (int)MULTI_ARG_2_DI_TF }, - { OPTION_MASK_ISA_AVX, CODE_FOR_xop_vpermil2v2df3, "__builtin_ia32_vpermil2pd", IX86_BUILTIN_VPERMIL2PD, UNKNOWN, (int)MULTI_ARG_4_DF2_DI_I }, - { OPTION_MASK_ISA_AVX, CODE_FOR_xop_vpermil2v4sf3, "__builtin_ia32_vpermil2ps", IX86_BUILTIN_VPERMIL2PS, UNKNOWN, (int)MULTI_ARG_4_SF2_SI_I }, - { OPTION_MASK_ISA_AVX, CODE_FOR_xop_vpermil2v4df3, "__builtin_ia32_vpermil2pd256", IX86_BUILTIN_VPERMIL2PD256, UNKNOWN, (int)MULTI_ARG_4_DF2_DI_I1 }, - { OPTION_MASK_ISA_AVX, CODE_FOR_xop_vpermil2v8sf3, "__builtin_ia32_vpermil2ps256", IX86_BUILTIN_VPERMIL2PS256, UNKNOWN, (int)MULTI_ARG_4_SF2_SI_I1 }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vpermil2v2df3, "__builtin_ia32_vpermil2pd", IX86_BUILTIN_VPERMIL2PD, UNKNOWN, (int)MULTI_ARG_4_DF2_DI_I }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vpermil2v4sf3, "__builtin_ia32_vpermil2ps", IX86_BUILTIN_VPERMIL2PS, UNKNOWN, (int)MULTI_ARG_4_SF2_SI_I }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vpermil2v4df3, "__builtin_ia32_vpermil2pd256", IX86_BUILTIN_VPERMIL2PD256, UNKNOWN, (int)MULTI_ARG_4_DF2_DI_I1 }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vpermil2v8sf3, "__builtin_ia32_vpermil2ps256", IX86_BUILTIN_VPERMIL2PS256, UNKNOWN, (int)MULTI_ARG_4_SF2_SI_I1 }, }; @@ -23630,10 +23630,10 @@ ix86_expand_args_builtin (const struct builtin_description *d, nargs = 3; nargs_constant = 2; break; - case MULTI_ARG_4_DF2_DI_I: - case MULTI_ARG_4_DF2_DI_I1: - case MULTI_ARG_4_SF2_SI_I: - case MULTI_ARG_4_SF2_SI_I1: + case V2DF_FTYPE_V2DF_V2DF_V2DI_INT: + case V4DF_FTYPE_V4DF_V4DF_V4DI_INT: + case V4SF_FTYPE_V4SF_V4SF_V4SI_INT: + case V8SF_FTYPE_V8SF_V8SF_V8SI_INT: nargs = 4; nargs_constant = 1; break;