From: bergner Date: Wed, 22 Nov 2006 19:06:41 +0000 (+0000) Subject: * config/rs6000/rs6000.c (get_store_dest): New. X-Git-Tag: upstream/4.9.2~51902 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=376fbe04ddd5d06dc6777b66d6bd074bd311ac72;p=platform%2Fupstream%2Flinaro-gcc.git * config/rs6000/rs6000.c (get_store_dest): New. (adjacent_mem_locations): Use get_store_dest() to get the rtl of the store destination. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@119099 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 31edafe..c6fdb9f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2006-11-22 Peter Bergner + + * config/rs6000/rs6000.c (get_store_dest): New. + (adjacent_mem_locations): Use get_store_dest() to get + the rtl of the store destination. + 2006-11-22 Joseph Myers * config/rs6000/spe.md (SPE64): New mode macro. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index f8e58fb..51e5117 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -693,6 +693,7 @@ static bool is_nonpipeline_insn (rtx); static bool is_cracked_insn (rtx); static bool is_branch_slot_insn (rtx); static bool is_load_insn (rtx); +static rtx get_store_dest (rtx pat); static bool is_store_insn (rtx); static bool set_to_load_agen (rtx,rtx); static bool adjacent_mem_locations (rtx,rtx); @@ -17066,9 +17067,9 @@ static bool adjacent_mem_locations (rtx insn1, rtx insn2) { - rtx a = SET_DEST (PATTERN (insn1)); - rtx b = SET_DEST (PATTERN (insn2)); - + rtx a = get_store_dest (PATTERN (insn1)); + rtx b = get_store_dest (PATTERN (insn2)); + if ((GET_CODE (XEXP (a, 0)) == REG || (GET_CODE (XEXP (a, 0)) == PLUS && GET_CODE (XEXP (XEXP (a, 0), 1)) == CONST_INT)) @@ -17374,6 +17375,32 @@ is_store_insn (rtx insn) return is_store_insn1 (PATTERN (insn)); } +/* Return the dest of a store insn. */ + +static rtx +get_store_dest (rtx pat) +{ + gcc_assert (is_store_insn1 (pat)); + + if (GET_CODE (pat) == SET) + return SET_DEST (pat); + else if (GET_CODE (pat) == PARALLEL) + { + int i; + + for (i = 0; i < XVECLEN (pat, 0); i++) + { + rtx inner_pat = XVECEXP (pat, 0, i); + if (GET_CODE (inner_pat) == SET + && is_mem_ref (SET_DEST (inner_pat))) + return inner_pat; + } + } + /* We shouldn't get here, because we should have either a simple + store insn or a store with update which are covered above. */ + gcc_unreachable(); +} + /* Returns whether the dependence between INSN and NEXT is considered costly by the given target. */