From: Mike Frysinger Date: Mon, 4 Jan 2016 00:54:25 +0000 (-0500) Subject: sim: TODO: move to wiki X-Git-Tag: gdb-7.11-release~377 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3726f72c654ab357be5b79c78f238da7a869f9a3;p=external%2Fbinutils.git sim: TODO: move to wiki We're maintaining development docs in the wiki now: https://sourceware.org/gdb/wiki/Sim/TODO --- diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index ce03a80..1bbef04 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,5 +1,9 @@ 2016-01-03 Mike Frysinger + * TODO: Delete file. + +2016-01-03 Mike Frysinger + * interp.c (count_argc): Delete. (bfin_syscall): Change count_argc to countargv. (bfin_user_init): Likewise. diff --git a/sim/bfin/TODO b/sim/bfin/TODO deleted file mode 100644 index e5346d3..0000000 --- a/sim/bfin/TODO +++ /dev/null @@ -1,54 +0,0 @@ -need to review ASTAT write behavior - -how to model RETE and IVG0 bit in IPEND ... - -model the loop buffer ? this means no ifetches because they're cached. -see page 4-26 in Blackfin PRM under hardware loops. - -handle DSPID at 0xffe05000 - -CEC should handle multiple exceptions at same address. would need -exception processing to be delayed ? at least needs a stack for -the CEC to pop things off. - -R0 = [SP++]; gets traced as R0 = [P6++]; - -merge dv-bfin_evt with dv-bfin_cec since the EVT regs are part of the CEC - -fix single stepping over debug assert instructions in hardware - -exception in IVG5 causes double fault ? - -SIC int forwarding doesn't accurately reflect the hardware. what the sim -does is: - - device generates an interrupt - - int is sent to SIC - - SIC logs it into its ISR - - so long as SIC's IMASK allows it, bits set in ISR generate - an interrupt to the CEC - - no way to clear the SIC's ISR -the way the hardware works is that the device monitors the interrupt level and -the SIC's ISR bits are basically hardwired from each peripheral. so when the -device has its interrupt cleared, the bit in the SIC's ISR is automatically -cleared as well. -perhaps the only way to model this behavior in the sim is to have each device -set up an event callback that sends out a port event: a level of 0 means the -int has been ACKed and the SIC can clear its ISR while a level of 1 means the -int is being generated still. if the device is still generating an interrupt, -it can reschedule itself again. - -insns that cause an interrupt don't seem to be processed at the right time. -for example, setup a glue device that generates an interrupt upon right. -when the store insn is executed, the interrupt is taken right away instead -of being scheduled *after* the insn has finished executing. difference is -that RETI needs to point to the *next* insn and not the store insn. - -tests: - - check AN bits with Dreg subtraction - R0 = R1 - R2; - - check astat bits with vector add/sub +|+ - - check acc with VIT_MAX and similiar insns - -flush[0xffa00000] causes HWERR in sim but not on hardware ? - -convert to using do_hw_attach_regs ? diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index 05283b8..7a6b86a 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,5 +1,9 @@ 2016-01-03 Mike Frysinger + * TODO: Delete file. + +2016-01-03 Mike Frysinger + * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. * configure: Regenerate. * frv.c (frvbf_h_fr_double_get_handler): Change diff --git a/sim/frv/TODO b/sim/frv/TODO deleted file mode 100644 index 6aa400b..0000000 --- a/sim/frv/TODO +++ /dev/null @@ -1,8 +0,0 @@ -- header file dependencies revisit -- hooks cleanup -- testsuites -- FIXME's -- memory accesses still test if profiling is on even in fast mode -- have semantic code use G/SET_H_FOO if not default [incl fun-access] -- have G/SET_H_FOO macros call function if fun-access -- --> can always use G/S_H_FOO macros diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 7d0eaf2..c4c9759 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,5 +1,9 @@ 2016-01-03 Mike Frysinger + * TODO: Delete file. + +2016-01-03 Mike Frysinger + * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. * configure: Regenerate. * traps-linux.c (conv_endian): Change CURRENT_HOST_BYTE_ORDER diff --git a/sim/m32r/TODO b/sim/m32r/TODO deleted file mode 100644 index 263daac..0000000 --- a/sim/m32r/TODO +++ /dev/null @@ -1,9 +0,0 @@ -- header file dependencies revisit -- hooks cleanup -- testsuites -- FIXME's -- memory accesses still test if profiling is on even in fast mode -- fill nop counting done even in fast mode -- have semantic code use G/SET_H_FOO if not default [incl fun-access] -- have G/SET_H_FOO macros call function if fun-access -- --> can always use G/S_H_FOO macros