From: Richard Gong Date: Mon, 15 Jun 2020 14:29:05 +0000 (-0500) Subject: firmware: stratix10-svc: correct reconfig flag and timeout values X-Git-Tag: v5.15~3208^2~125 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=36847f9e3e56c192ef95e7669df38189443530a0;p=platform%2Fkernel%2Flinux-starfive.git firmware: stratix10-svc: correct reconfig flag and timeout values Correct the incorrect flag value for COMMAND_RECONFIG_FLAG_PARTIAL and increase FPGA reconfig timeout values so that Intel service layer and FPGA manager drivers can work with all versions of firmware. Signed-off-by: Richard Gong Link: https://lore.kernel.org/r/1592231348-31334-2-git-send-email-richard.gong@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- diff --git a/include/linux/firmware/intel/stratix10-svc-client.h b/include/linux/firmware/intel/stratix10-svc-client.h index 64213c3..040bc3f 100644 --- a/include/linux/firmware/intel/stratix10-svc-client.h +++ b/include/linux/firmware/intel/stratix10-svc-client.h @@ -54,18 +54,17 @@ * Flag bit for COMMAND_RECONFIG * * COMMAND_RECONFIG_FLAG_PARTIAL: - * Set to FPGA configuration type (full or partial), the default - * is full reconfig. + * Set to FPGA configuration type (full or partial). */ -#define COMMAND_RECONFIG_FLAG_PARTIAL 0 +#define COMMAND_RECONFIG_FLAG_PARTIAL 1 /** * Timeout settings for service clients: * timeout value used in Stratix10 FPGA manager driver. * timeout value used in RSU driver */ -#define SVC_RECONFIG_REQUEST_TIMEOUT_MS 100 -#define SVC_RECONFIG_BUFFER_TIMEOUT_MS 240 +#define SVC_RECONFIG_REQUEST_TIMEOUT_MS 300 +#define SVC_RECONFIG_BUFFER_TIMEOUT_MS 720 #define SVC_RSU_REQUEST_TIMEOUT_MS 300 struct stratix10_svc_chan;