From: Rob Herring Date: Mon, 27 Mar 2023 16:20:57 +0000 (-0500) Subject: perf arm-spe: Add raw decoding for SPEv1.3 MTE and MOPS load/store X-Git-Tag: v6.6.17~4887^2~173 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=34fb60400e3257f3a046ee8e6b49242cf65cc1a3;p=platform%2Fkernel%2Flinux-rpi.git perf arm-spe: Add raw decoding for SPEv1.3 MTE and MOPS load/store Arm SPEv1.3 adds new load/store operation subclasses for Memory Tagging Extension (MTE) and memory operations (MOPS). The memory operations are memcpy and memset. Add support for decoding these new subclasses in the raw decoding. Reviewed-by: Leo Yan Cc: Alexander Shishkin Cc: Ian Rogers Cc: Ingo Molnar Cc: Jiri Olsa Cc: Leo Yan Cc: Mark Rutland Cc: Namhyung Kim Cc: Peter Zijlstra Link: https://lore.kernel.org/r/20230327162057.4057188-1-robh@kernel.org Signed-off-by: Arnaldo Carvalho de Melo --- diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index fed4741f372e..a454c6737563 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -381,6 +381,15 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG: arm_spe_pkt_out_string(&err, &buf, &buf_len, " NV-SYSREG"); break; + case SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG: + arm_spe_pkt_out_string(&err, &buf, &buf_len, " MTE-TAG"); + break; + case SPE_OP_PKT_LDST_SUBCLASS_MEMCPY: + arm_spe_pkt_out_string(&err, &buf, &buf_len, " MEMCPY"); + break; + case SPE_OP_PKT_LDST_SUBCLASS_MEMSET: + arm_spe_pkt_out_string(&err, &buf, &buf_len, " MEMSET"); + break; default: break; } diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index f75ed3a8a050..464a912b221c 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -123,6 +123,9 @@ enum arm_spe_events { #define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP 0x4 #define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG 0x10 #define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG 0x30 +#define SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG 0x14 +#define SPE_OP_PKT_LDST_SUBCLASS_MEMCPY 0x20 +#define SPE_OP_PKT_LDST_SUBCLASS_MEMSET 0x25 #define SPE_OP_PKT_IS_LDST_ATOMIC(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)