From: Steve MacLean <sdmaclea@qti.qualcomm.com>
Date: Fri, 28 Apr 2017 02:03:49 +0000 (-0400)
Subject: Remove comment
X-Git-Tag: submit/tizen/20210909.063632~11030^2~7075^2~1
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=346bc66c1b093ea28cc16131182df935f89c429d;p=platform%2Fupstream%2Fdotnet%2Fruntime.git

Remove comment

Commit migrated from https://github.com/dotnet/coreclr/commit/8df1748f28dab626ec40eaab9801053743b150cc
---

diff --git a/src/coreclr/src/jit/emit.h b/src/coreclr/src/jit/emit.h
index 8744483..a63242f 100644
--- a/src/coreclr/src/jit/emit.h
+++ b/src/coreclr/src/jit/emit.h
@@ -656,7 +656,7 @@ protected:
         // The instrDescCGCA struct's member keeping the GC-ness of the first return register is _idcSecondRetRegGCType.
         GCtype _idGCref : 2; // GCref operand? (value is a "GCtype")
 #ifdef _TARGET_ARM64_
-        GCtype _idGCref2 : 2; // GCref operand fir register 2? (value is a "GCtype")
+        GCtype _idGCref2 : 2;
 #endif
 
         // Note that we use the _idReg1 and _idReg2 fields to hold