From: Nick Clifton Date: Wed, 4 Sep 2002 12:37:30 +0000 (+0000) Subject: Do not insert non-BookE32 instructions into the hash table if the target cpu X-Git-Tag: drow-cplus-branchpoint~417 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=341026c1c143611e52a7bae351f7a886a8cc19a3;p=platform%2Fupstream%2Fbinutils.git Do not insert non-BookE32 instructions into the hash table if the target cpu is the BookE32. (case 107575) --- diff --git a/gas/ChangeLog b/gas/ChangeLog index f9466e9..2d8c4af9 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2002-09-04 Nick Clifton + + * config/tc-ppc.c (md_begin): Do not insert non-BookE32 + instructions into the hash table if the target cpu is the BookE32. + 2002-08-31 Hans-Peter Nilsson * read.c (do_align): Use ATTRIBUTE_UNUSED_LABEL for label, not diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index b19e04d..b7679f9 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -1207,6 +1207,14 @@ md_begin () || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64))) || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0) + /* Certain instructions (eg: extsw) do not exist in the + 32-bit BookE instruction set, but they do exist in the + 64-bit BookE instruction set, and other PPC instruction + sets. Check to see if the opcode has the BOOKE64 flag set. + If it does make sure that the target CPU is not the BookE32. */ + && ((op->flags & PPC_OPCODE_BOOKE64) == 0 + || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64 + || (ppc_cpu & PPC_OPCODE_BOOKE) == 0) && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0 || ((op->flags & PPC_OPCODE_POWER4) == (ppc_cpu & PPC_OPCODE_POWER4)))) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9f0d0d1..f1c2028 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2002-09-04 Nick Clifton + * ppc-opc.c (extsw, extsw.): Do not allow for the BookE32. + +2002-09-04 Nick Clifton + * disassemble.c (disassembler_usage): Add invocation of print_ppc_disassembler_options. * ppc-dis.c (print_ppc_disassembler_options): New function. diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index ff7e8d7..1a8627f 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -4238,8 +4238,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA, RB } }, -{ "extsw", XRC(31,986,0), XRB_MASK, PPC, { RA, RS } }, -{ "extsw.", XRC(31,986,1), XRB_MASK, PPC, { RA, RS } }, +{ "extsw", XRC(31,986,0), XRB_MASK, PPC | BOOKE64, { RA, RS } }, +{ "extsw.", XRC(31,986,1), XRB_MASK, PPC | BOOKE64, { RA, RS } }, { "icread", X(31,998), XRT_MASK, PPC403, { RA, RB } },