From: Rob Clark <robdclark@chromium.org>
Date: Thu, 19 Sep 2019 18:30:01 +0000 (-0700)
Subject: freedreno/a6xx: un-open-code PC_PRIMITIVE_CNTL_1.PSIZE
X-Git-Tag: upstream/19.3.0~1699
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=331f89a97176b4b559c7020d69b148b85473f16b;p=platform%2Fupstream%2Fmesa.git

freedreno/a6xx: un-open-code PC_PRIMITIVE_CNTL_1.PSIZE

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
---

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 3a1c0a4..08c264b 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -399,7 +399,7 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
 
 	OUT_PKT4(ring, REG_A6XX_PC_PRIMITIVE_CNTL_1, 1);
 	OUT_RING(ring, A6XX_PC_PRIMITIVE_CNTL_1_STRIDE_IN_VPC(l.max_loc) |
-			 CONDREG(psize_regid, 0x100));
+			 CONDREG(psize_regid, A6XX_PC_PRIMITIVE_CNTL_1_PSIZE));
 
 	if (binning_pass) {
 		OUT_PKT4(ring, REG_A6XX_SP_FS_OBJ_START_LO, 2);