From: Ulrich Drepper Date: Fri, 22 Mar 2002 08:29:10 +0000 (+0000) Subject: Update. X-Git-Tag: cvs/glibc-2-3~952 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=32fe4a9320702ca48a812e60800bd3ec6f21418c;p=platform%2Fupstream%2Fglibc.git Update. 2002-03-22 Ulrich Drepper * internals.h (MEMORY_BARRIER): Define as asm with memory as clobber. --- diff --git a/linuxthreads/ChangeLog b/linuxthreads/ChangeLog index 8ba4345f..18c86f5 100644 --- a/linuxthreads/ChangeLog +++ b/linuxthreads/ChangeLog @@ -1,3 +1,7 @@ +2002-03-22 Ulrich Drepper + + * internals.h (MEMORY_BARRIER): Define as asm with memory as clobber. + 2002-03-17 Andreas Jaeger * sysdeps/i386/pt-machine.h: Add testandset and __compare_and_swap diff --git a/linuxthreads/internals.h b/linuxthreads/internals.h index 8fef62f..45a73ad 100644 --- a/linuxthreads/internals.h +++ b/linuxthreads/internals.h @@ -193,12 +193,14 @@ static inline int nonexisting_handle(pthread_handle h, pthread_t id) #define THREAD_STACK_START_ADDRESS __pthread_initial_thread_bos #endif -/* If MEMORY_BARRIER isn't defined in pt-machine.h, assume the architecture - doesn't need a memory barrier instruction (e.g. Intel x86). Some - architectures distinguish between full, read and write barriers. */ +/* If MEMORY_BARRIER isn't defined in pt-machine.h, assume the + architecture doesn't need a memory barrier instruction (e.g. Intel + x86). Still we need the compiler to respect the barrier and emit + all outstanding operations which modify memory. Some architectures + distinguish between full, read and write barriers. */ #ifndef MEMORY_BARRIER -#define MEMORY_BARRIER() +#define MEMORY_BARRIER() asm ("" : : : "memory") #endif #ifndef READ_MEMORY_BARRIER #define READ_MEMORY_BARRIER() MEMORY_BARRIER()