From: Ville Syrjälä Date: Tue, 30 Jan 2018 20:38:01 +0000 (+0200) Subject: drm/i915: Don't set cursor pipe select bits on g4x+ X-Git-Tag: v4.19~298^2~46^2~590 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=32ea06b67eb2b693c78bd795b8a8f7fdac03fb6a;p=platform%2Fkernel%2Flinux-rpi3.git drm/i915: Don't set cursor pipe select bits on g4x+ G4x cursor control registers still allow us to write to the pipe select bits even though cursors are supposed to be fixed to a specific pipe. Bspec tells us that we should only ever write 0 to these bits. Let's follow that recommendation. On ilk+ the bits become hardwired to 0. Also looks like ICL repurposes these bits for some other use, so we had better stop setting them to bogus values there. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20180130203807.13721-1-ville.syrjala@linux.intel.com Reviewed-by: Mika Kahola --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3c479e3..a0d9b0a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9540,7 +9540,8 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, if (HAS_DDI(dev_priv)) cntl |= CURSOR_PIPE_CSC_ENABLE; - cntl |= MCURSOR_PIPE_SELECT(crtc->pipe); + if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) + cntl |= MCURSOR_PIPE_SELECT(crtc->pipe); switch (plane_state->base.crtc_w) { case 64: