From: Alexander Duyck <alexander.h.duyck@intel.com>
Date: Wed, 17 Nov 2010 03:26:59 +0000 (-0800)
Subject: ixgbe: change vector numbering so that queues end up on correct CPUs
X-Git-Tag: v3.0~2504^2~547^2~28
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=32aa77a4fc06bd1116f83c25bf0389a3e9b80533;p=platform%2Fkernel%2Flinux-amlogic.git

ixgbe: change vector numbering so that queues end up on correct CPUs

This changes the numbering scheme slightly. Previously the ordering was
coming out like this:
Rx-2
Rx-1
Rx-0
TxRx-0
Which would drop two queues on CPU 0. This change makes it so that the
ordering is like this:
Rx-3
Rx-2
Rx-1
TxRx-0
This means that each CPU will have it's own Rx queue, and only CPU 0 will
have the Tx queue.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---

diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 1d78b55..5dde7d6 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -2182,9 +2182,11 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
 		} else if (handler == &ixgbe_msix_clean_tx) {
 			sprintf(adapter->name[vector], "%s-%s-%d",
 				netdev->name, "tx", ti++);
-		} else
+		} else {
 			sprintf(adapter->name[vector], "%s-%s-%d",
-				netdev->name, "TxRx", vector);
+				netdev->name, "TxRx", ri++);
+			ti++;
+		}
 
 		err = request_irq(adapter->msix_entries[vector].vector,
 				  handler, 0, adapter->name[vector],