From: Ian Romanick Date: Wed, 11 Aug 2021 00:30:13 +0000 (-0700) Subject: iris: Calculate uses_atomic_load_store after all lowering X-Git-Tag: upstream/22.3.5~17803 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=3281ccf4b149986c875b0ebd83d018323ef0f307;p=platform%2Fupstream%2Fmesa.git iris: Calculate uses_atomic_load_store after all lowering The lowering passes will soon be moved to another function, so there won't be any choice. As a side benefit, this allows eliminating the uses_atomic_load_store **pointer** parameter from brw_nir_lower_storage_image. For some reason crocus was passing false instead of NULL. Reviewed-by: Kenneth Graunke Part-of: --- diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c index 14001b1..eccf7bf 100644 --- a/src/gallium/drivers/crocus/crocus_program.c +++ b/src/gallium/drivers/crocus/crocus_program.c @@ -2683,7 +2683,7 @@ crocus_create_uncompiled_shader(struct pipe_context *ctx, brw_preprocess_nir(screen->compiler, nir, NULL); - NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo, false); + NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo); NIR_PASS_V(nir, crocus_lower_storage_image_derefs); nir_sweep(nir); diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index b53bdd6..840a5cb 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -300,6 +300,55 @@ iris_lower_storage_image_derefs(nir_shader *nir) } } +static bool +iris_uses_image_atomic(const nir_shader *shader) +{ + nir_foreach_function(function, shader) { + if (function->impl == NULL) + continue; + + nir_foreach_block(block, function->impl) { + nir_foreach_instr(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + switch (intrin->intrinsic) { + case nir_intrinsic_image_deref_atomic_add: + case nir_intrinsic_image_deref_atomic_imin: + case nir_intrinsic_image_deref_atomic_umin: + case nir_intrinsic_image_deref_atomic_imax: + case nir_intrinsic_image_deref_atomic_umax: + case nir_intrinsic_image_deref_atomic_and: + case nir_intrinsic_image_deref_atomic_or: + case nir_intrinsic_image_deref_atomic_xor: + case nir_intrinsic_image_deref_atomic_exchange: + case nir_intrinsic_image_deref_atomic_comp_swap: + unreachable("Should have been lowered in " + "iris_lower_storage_image_derefs"); + + case nir_intrinsic_image_atomic_add: + case nir_intrinsic_image_atomic_imin: + case nir_intrinsic_image_atomic_umin: + case nir_intrinsic_image_atomic_imax: + case nir_intrinsic_image_atomic_umax: + case nir_intrinsic_image_atomic_and: + case nir_intrinsic_image_atomic_or: + case nir_intrinsic_image_atomic_xor: + case nir_intrinsic_image_atomic_exchange: + case nir_intrinsic_image_atomic_comp_swap: + return true; + + default: + break; + } + } + } + } + + return false; +} + /** * Undo nir_lower_passthrough_edgeflags but keep the inputs_read flag. */ @@ -2395,12 +2444,13 @@ iris_create_uncompiled_shader(struct iris_screen *screen, brw_preprocess_nir(screen->compiler, nir, NULL); - NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo, - &ish->uses_atomic_load_store); + NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo); NIR_PASS_V(nir, iris_lower_storage_image_derefs); nir_sweep(nir); + ish->uses_atomic_load_store = iris_uses_image_atomic(nir); + ish->program_id = get_new_program_id(screen); ish->nir = nir; if (so_info) { diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index 5110464..1b325e8 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -123,8 +123,7 @@ bool brw_nir_lower_conversions(nir_shader *nir); bool brw_nir_lower_scoped_barriers(nir_shader *nir); bool brw_nir_lower_storage_image(nir_shader *nir, - const struct intel_device_info *devinfo, - bool *uses_atomic_load_store); + const struct intel_device_info *devinfo); void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *index); void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin, diff --git a/src/intel/compiler/brw_nir_lower_storage_image.c b/src/intel/compiler/brw_nir_lower_storage_image.c index 7eeaee7..4d132f5 100644 --- a/src/intel/compiler/brw_nir_lower_storage_image.c +++ b/src/intel/compiler/brw_nir_lower_storage_image.c @@ -671,8 +671,7 @@ lower_image_size_instr(nir_builder *b, bool brw_nir_lower_storage_image(nir_shader *shader, - const struct intel_device_info *devinfo, - bool *uses_atomic_load_store) + const struct intel_device_info *devinfo) { bool progress = false; @@ -716,8 +715,6 @@ brw_nir_lower_storage_image(nir_shader *shader, case nir_intrinsic_image_deref_atomic_xor: case nir_intrinsic_image_deref_atomic_exchange: case nir_intrinsic_image_deref_atomic_comp_swap: - if (uses_atomic_load_store) - *uses_atomic_load_store = true; if (lower_image_atomic_instr(&b, devinfo, intrin)) impl_progress = true; break; diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index ebb077f..864c973 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -833,7 +833,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); - NIR_PASS_V(nir, brw_nir_lower_storage_image, compiler->devinfo, NULL); + NIR_PASS_V(nir, brw_nir_lower_storage_image, compiler->devinfo); NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_global, nir_address_format_64bit_global); diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index c3c9f53..ffa0698 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -186,7 +186,7 @@ brw_nir_lower_resources(nir_shader *nir, struct gl_shader_program *shader_prog, BITSET_COPY(prog->info.textures_used, prog->nir->info.textures_used); BITSET_COPY(prog->info.textures_used_by_txf, prog->nir->info.textures_used_by_txf); - NIR_PASS_V(prog->nir, brw_nir_lower_storage_image, devinfo, NULL); + NIR_PASS_V(prog->nir, brw_nir_lower_storage_image, devinfo); if (prog->nir->info.stage == MESA_SHADER_COMPUTE && shader_prog->data->spirv) {