From: Jisheng Zhang <jszhang@kernel.org>
Date: Wed, 14 Jun 2023 16:55:02 +0000 (+0800)
Subject: riscv: errata: thead: only set cbom size & noncoherent during boot
X-Git-Tag: v6.6.17~4417^2^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=31ca5d49264ba6197aa48a926f6a035ed08b3715;p=platform%2Fkernel%2Flinux-rpi.git

riscv: errata: thead: only set cbom size & noncoherent during boot

The CBOM size and whether the HW is noncoherent is known and
determined during booting and won't change after that.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230614165504.532-2-jszhang@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---

diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index c259dc9..be84b14 100644
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -45,8 +45,11 @@ static bool errata_probe_cmo(unsigned int stage,
 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
 		return false;
 
-	riscv_cbom_block_size = L1_CACHE_BYTES;
-	riscv_noncoherent_supported();
+	if (stage == RISCV_ALTERNATIVES_BOOT) {
+		riscv_cbom_block_size = L1_CACHE_BYTES;
+		riscv_noncoherent_supported();
+	}
+
 	return true;
 }