From: Kefeng Wang Date: Wed, 28 Oct 2020 04:28:42 +0000 (+0800) Subject: riscv: Add HAVE_IRQ_TIME_ACCOUNTING X-Git-Tag: accepted/tizen/unified/20230118.172025~8221^2~11 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=31564b8b6dbaf9035d27131982d3296c10742baa;p=platform%2Fkernel%2Flinux-rpi.git riscv: Add HAVE_IRQ_TIME_ACCOUNTING RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING. Signed-off-by: Kefeng Wang Signed-off-by: Palmer Dabbelt --- diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt index d9082b9..6fc03de 100644 --- a/Documentation/features/time/irq-time-acct/arch-support.txt +++ b/Documentation/features/time/irq-time-acct/arch-support.txt @@ -23,7 +23,7 @@ | openrisc: | TODO | | parisc: | .. | | powerpc: | ok | - | riscv: | TODO | + | riscv: | ok | | s390: | .. | | sh: | TODO | | sparc: | .. | diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 44377fd..dfbc135 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -68,6 +68,7 @@ config RISCV select HAVE_FUTEX_CMPXCHG if FUTEX select HAVE_GCC_PLUGINS select HAVE_GENERIC_VDSO if MMU && 64BIT + select HAVE_IRQ_TIME_ACCOUNTING select HAVE_PCI select HAVE_PERF_EVENTS select HAVE_PERF_REGS