From: Bartlomiej Zolnierkiewicz Date: Fri, 10 Apr 2015 17:59:00 +0000 (+0200) Subject: ARM: dts: Exynos4x12: add CPU OPP and regulator supply property X-Git-Tag: submit/tizen/20150514.054553~15 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=310f06d7772bfb70a78e672ca84e1164900b83f7;p=platform%2Fkernel%2Flinux-exynos.git ARM: dts: Exynos4x12: add CPU OPP and regulator supply property For Exynos4x12 platforms, add CPU operating points and CPU regulator supply properties for migrating from Exynos specific cpufreq driver to using generic cpufreq driver. Based on the earlier work by Thomas Abraham. Cc: Kukjin Kim Cc: Doug Anderson Cc: Javier Martinez Canillas Cc: Andreas Faerber Cc: Sachin Kamat Cc: Andreas Farber Cc: Javier Martinez Canillas Cc: Thomas Abraham Signed-off-by: Bartlomiej Zolnierkiewicz --- diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index 5be03288f1ee..f97e4b5b304d 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -30,6 +30,28 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0xA00>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu"; + + operating-points = < + 1400000 1287500 + 1300000 1250000 + 1200000 1187500 + 1100000 1137500 + 1000000 1087500 + 900000 1037500 + 800000 1000000 + 700000 987500 + 600000 975000 + 500000 950000 + 400000 925000 + 300000 900000 + 200000 900000 + >; + boost-opps = < + 1500000 1350000 + >; + clock-latency = <200000>; cooling-min-level = <13>; cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 8b28c28d03c5..c252212fa4ca 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -513,3 +513,7 @@ samsung,pin-pud = <1>; }; }; + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index bd8b73077d41..a9c957c7fc5f 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -532,3 +532,8 @@ }; }; }; + + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 173ffa479ad3..47f9b475702f 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -1304,3 +1304,8 @@ PIN_SLP(gpv4-0, INPUT, DOWN); }; }; + + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 68ad43b391ae..903981e8cb88 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -30,6 +30,28 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0xA00>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu"; + + operating-points = < + 1400000 1287500 + 1300000 1250000 + 1200000 1187500 + 1100000 1137500 + 1000000 1087500 + 900000 1037500 + 800000 1000000 + 700000 987500 + 600000 975000 + 500000 950000 + 400000 925000 + 300000 900000 + 200000 900000 + >; + boost-opps = < + 1500000 1350000 + >; + clock-latency = <200000>; cooling-min-level = <13>; cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */