From: Simon Pilgrim Date: Tue, 31 Mar 2020 16:53:02 +0000 (+0100) Subject: [X86][SSE] Add additional PTEST/TESTP inversion tests X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=30436a1ce7f3d2de8aaaa5f559060682a54fd16e;p=platform%2Fupstream%2Fllvm.git [X86][SSE] Add additional PTEST/TESTP inversion tests --- diff --git a/llvm/test/CodeGen/X86/combine-ptest.ll b/llvm/test/CodeGen/X86/combine-ptest.ll index 3a888aa..afb4acd 100644 --- a/llvm/test/CodeGen/X86/combine-ptest.ll +++ b/llvm/test/CodeGen/X86/combine-ptest.ll @@ -5,8 +5,8 @@ ; testz(~X,Y) -> testc(X,Y) ; -define i32 @ptestz_128_invert(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { -; CHECK-LABEL: ptestz_128_invert: +define i32 @ptestz_128_invert0(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -21,8 +21,8 @@ define i32 @ptestz_128_invert(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { ret i32 %t4 } -define i32 @ptestz_256_invert(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { -; CHECK-LABEL: ptestz_256_invert: +define i32 @ptestz_256_invert0(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -40,11 +40,49 @@ define i32 @ptestz_256_invert(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { } ; +; testz(X,~Y) -> testc(Y,X) +; + +define i32 @ptestz_128_invert1(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_128_invert1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vpxor %xmm2, %xmm1, %xmm1 +; CHECK-NEXT: vptest %xmm1, %xmm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: retq + %t1 = xor <2 x i64> %d, + %t2 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %t1) + %t3 = icmp ne i32 %t2, 0 + %t4 = select i1 %t3, i32 %a, i32 %b + ret i32 %t4 +} + +define i32 @ptestz_256_invert1(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_256_invert1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vcmptrueps %ymm2, %ymm2, %ymm2 +; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1 +; CHECK-NEXT: vptest %ymm1, %ymm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: retq + %t1 = xor <4 x i64> %d, + %t2 = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %c, <4 x i64> %t1) + %t3 = icmp ne i32 %t2, 0 + %t4 = select i1 %t3, i32 %a, i32 %b + ret i32 %t4 +} + +; ; testc(~X,Y) -> testz(X,Y) ; -define i32 @ptestc_128_invert(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { -; CHECK-LABEL: ptestc_128_invert: +define i32 @ptestc_128_invert0(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestc_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -59,8 +97,8 @@ define i32 @ptestc_128_invert(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { ret i32 %t4 } -define i32 @ptestc_256_invert(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { -; CHECK-LABEL: ptestc_256_invert: +define i32 @ptestc_256_invert0(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestc_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -81,8 +119,8 @@ define i32 @ptestc_256_invert(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { ; testnzc(~X,Y) -> testnzc(X,Y) ; -define i32 @ptestnzc_128_invert(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { -; CHECK-LABEL: ptestnzc_128_invert: +define i32 @ptestnzc_128_invert0(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestnzc_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -97,8 +135,8 @@ define i32 @ptestnzc_128_invert(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) { ret i32 %t4 } -define i32 @ptestnzc_256_invert(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { -; CHECK-LABEL: ptestnzc_256_invert: +define i32 @ptestnzc_256_invert0(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { +; CHECK-LABEL: ptestnzc_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -115,6 +153,74 @@ define i32 @ptestnzc_256_invert(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) { ret i32 %t4 } +; +; testz(-1,X) -> testz(X,X) +; + +define i32 @ptestz_128_allones0(<2 x i64> %c, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_128_allones0: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; CHECK-NEXT: vptest %xmm0, %xmm1 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: retq + %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> , <2 x i64> %c) + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 %a, i32 %b + ret i32 %t3 +} + +define i32 @ptestz_256_allones0(<4 x i64> %c, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_256_allones0: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 +; CHECK-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1 +; CHECK-NEXT: vptest %ymm0, %ymm1 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: retq + %t1 = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> , <4 x i64> %c) + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 %a, i32 %b + ret i32 %t3 +} + +; +; testz(X,-1) -> testz(X,X) +; + +define i32 @ptestz_128_allones1(<2 x i64> %c, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_128_allones1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; CHECK-NEXT: vptest %xmm1, %xmm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: retq + %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> ) + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 %a, i32 %b + ret i32 %t3 +} + +define i32 @ptestz_256_allones1(<4 x i64> %c, i32 %a, i32 %b) { +; CHECK-LABEL: ptestz_256_allones1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 +; CHECK-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1 +; CHECK-NEXT: vptest %ymm1, %ymm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: retq + %t1 = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %c, <4 x i64> ) + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 %a, i32 %b + ret i32 %t3 +} + define zeroext i1 @PR38522(<16 x i8>* %x, <16 x i8>* %y) { ; CHECK-LABEL: PR38522: ; CHECK: # %bb.0: # %start diff --git a/llvm/test/CodeGen/X86/combine-testpd.ll b/llvm/test/CodeGen/X86/combine-testpd.ll index eaf4eb6..b43ac2a 100644 --- a/llvm/test/CodeGen/X86/combine-testpd.ll +++ b/llvm/test/CodeGen/X86/combine-testpd.ll @@ -5,8 +5,8 @@ ; testz(~X,Y) -> testc(X,Y) ; -define i32 @testpdz_128_invert(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpdz_128_invert: +define i32 @testpdz_128_invert0(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdz_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -23,8 +23,8 @@ define i32 @testpdz_128_invert(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) ret i32 %t5 } -define i32 @testpdz_256_invert(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpdz_256_invert: +define i32 @testpdz_256_invert0(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdz_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -44,11 +44,53 @@ define i32 @testpdz_256_invert(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) } ; +; testz(X,~Y) -> testc(Y,X) +; + +define i32 @testpdz_128_invert1(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdz_128_invert1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vpxor %xmm2, %xmm1, %xmm1 +; CHECK-NEXT: vtestpd %xmm1, %xmm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: retq + %t0 = bitcast <2 x double> %d to <2 x i64> + %t1 = xor <2 x i64> %t0, + %t2 = bitcast <2 x i64> %t1 to <2 x double> + %t3 = call i32 @llvm.x86.avx.vtestz.pd(<2 x double> %c, <2 x double> %t2) + %t4 = icmp ne i32 %t3, 0 + %t5 = select i1 %t4, i32 %a, i32 %b + ret i32 %t5 +} + +define i32 @testpdz_256_invert1(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdz_256_invert1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vcmptrueps %ymm2, %ymm2, %ymm2 +; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1 +; CHECK-NEXT: vtestpd %ymm1, %ymm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: retq + %t0 = bitcast <4 x double> %d to <4 x i64> + %t1 = xor <4 x i64> %t0, + %t2 = bitcast <4 x i64> %t1 to <4 x double> + %t3 = call i32 @llvm.x86.avx.vtestz.pd.256(<4 x double> %c, <4 x double> %t2) + %t4 = icmp ne i32 %t3, 0 + %t5 = select i1 %t4, i32 %a, i32 %b + ret i32 %t5 +} + +; ; testc(~X,Y) -> testz(X,Y) ; -define i32 @testpdc_128_invert(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpdc_128_invert: +define i32 @testpdc_128_invert0(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdc_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -65,8 +107,8 @@ define i32 @testpdc_128_invert(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) ret i32 %t5 } -define i32 @testpdc_256_invert(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpdc_256_invert: +define i32 @testpdc_256_invert0(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdc_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -89,8 +131,8 @@ define i32 @testpdc_256_invert(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) ; testnzc(~X,Y) -> testnzc(X,Y) ; -define i32 @testpdnzc_128_invert(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpdnzc_128_invert: +define i32 @testpdnzc_128_invert0(<2 x double> %c, <2 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdnzc_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -107,8 +149,8 @@ define i32 @testpdnzc_128_invert(<2 x double> %c, <2 x double> %d, i32 %a, i32 % ret i32 %t5 } -define i32 @testpdnzc_256_invert(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpdnzc_256_invert: +define i32 @testpdnzc_256_invert0(<4 x double> %c, <4 x double> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpdnzc_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 diff --git a/llvm/test/CodeGen/X86/combine-testps.ll b/llvm/test/CodeGen/X86/combine-testps.ll index 85537ef..6b5e653 100644 --- a/llvm/test/CodeGen/X86/combine-testps.ll +++ b/llvm/test/CodeGen/X86/combine-testps.ll @@ -5,8 +5,8 @@ ; testz(~X,Y) -> testc(X,Y) ; -define i32 @testpsz_128_invert(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpsz_128_invert: +define i32 @testpsz_128_invert0(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsz_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -23,8 +23,8 @@ define i32 @testpsz_128_invert(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { ret i32 %t5 } -define i32 @testpsz_256_invert(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpsz_256_invert: +define i32 @testpsz_256_invert0(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsz_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -44,11 +44,53 @@ define i32 @testpsz_256_invert(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { } ; +; testz(X,~Y) -> testc(Y,X) +; + +define i32 @testpsz_128_invert1(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsz_128_invert1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vpxor %xmm2, %xmm1, %xmm1 +; CHECK-NEXT: vtestps %xmm1, %xmm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: retq + %t0 = bitcast <4 x float> %d to <2 x i64> + %t1 = xor <2 x i64> %t0, + %t2 = bitcast <2 x i64> %t1 to <4 x float> + %t3 = call i32 @llvm.x86.avx.vtestz.ps(<4 x float> %c, <4 x float> %t2) + %t4 = icmp ne i32 %t3, 0 + %t5 = select i1 %t4, i32 %a, i32 %b + ret i32 %t5 +} + +define i32 @testpsz_256_invert1(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsz_256_invert1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vcmptrueps %ymm2, %ymm2, %ymm2 +; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1 +; CHECK-NEXT: vtestps %ymm1, %ymm0 +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: retq + %t0 = bitcast <8 x float> %d to <4 x i64> + %t1 = xor <4 x i64> %t0, + %t2 = bitcast <4 x i64> %t1 to <8 x float> + %t3 = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %c, <8 x float> %t2) + %t4 = icmp ne i32 %t3, 0 + %t5 = select i1 %t4, i32 %a, i32 %b + ret i32 %t5 +} + +; ; testc(~X,Y) -> testz(X,Y) ; -define i32 @testpsc_128_invert(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpsc_128_invert: +define i32 @testpsc_128_invert0(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsc_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -65,8 +107,8 @@ define i32 @testpsc_128_invert(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { ret i32 %t5 } -define i32 @testpsc_256_invert(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpsc_256_invert: +define i32 @testpsc_256_invert0(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsc_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 @@ -89,8 +131,8 @@ define i32 @testpsc_256_invert(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { ; testnzc(~X,Y) -> testnzc(X,Y) ; -define i32 @testpsnzc_128_invert(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpsnzc_128_invert: +define i32 @testpsnzc_128_invert0(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsnzc_128_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 @@ -107,8 +149,8 @@ define i32 @testpsnzc_128_invert(<4 x float> %c, <4 x float> %d, i32 %a, i32 %b) ret i32 %t5 } -define i32 @testpsnzc_256_invert(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { -; CHECK-LABEL: testpsnzc_256_invert: +define i32 @testpsnzc_256_invert0(<8 x float> %c, <8 x float> %d, i32 %a, i32 %b) { +; CHECK-LABEL: testpsnzc_256_invert0: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2