From: Konstantin Baladurin <k.baladurin@partner.samsung.com>
Date: Fri, 10 Aug 2018 23:10:53 +0000 (+0300)
Subject: CORDbgSetInstruction: clear thumb bit of the address before flushing icache (#19409)
X-Git-Tag: accepted/tizen/unified/20190422.045933~1472
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=303c8b78151bb7a8f17b32f6e22f52a2227146b2;p=platform%2Fupstream%2Fcoreclr.git

CORDbgSetInstruction: clear thumb bit of the address before flushing icache (#19409)

We should clear thumb bit of the address before flushing icache otherwise
we may not flush the cache for the first byte of the instruction.
---

diff --git a/src/debug/inc/arm/primitives.h b/src/debug/inc/arm/primitives.h
index 512baf7..24779d7 100644
--- a/src/debug/inc/arm/primitives.h
+++ b/src/debug/inc/arm/primitives.h
@@ -166,7 +166,7 @@ inline void CORDbgSetInstruction(CORDB_ADDRESS_TYPE* address,
 
     *(PRD_TYPE *)ptraddr = instruction;
     FlushInstructionCache(GetCurrentProcess(),
-                          address,
+                          _ClearThumbBit(address),
                           sizeof(PRD_TYPE));
 }