From: Craig Topper Date: Wed, 25 Apr 2018 17:35:03 +0000 (+0000) Subject: [X86] Form MUL_IMM for multiplies with 3/5/9 to encourage LEA formation over load... X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=300e20d61c331e4978015a9da4288026901c945a;p=platform%2Fupstream%2Fllvm.git [X86] Form MUL_IMM for multiplies with 3/5/9 to encourage LEA formation over load folding. Previously we only formed MUL_IMM when we split a constant. This blocked load folding on those cases. We should also form MUL_IMM for 3/5/9 to favor LEA over load folding. Differential Revision: https://reviews.llvm.org/D46040 llvm-svn: 330850 --- diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1e6fb92..4d95a2c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -33225,9 +33225,14 @@ static SDValue combineMul(SDNode *N, SelectionDAG &DAG, if (!C) return SDValue(); uint64_t MulAmt = C->getZExtValue(); - if (isPowerOf2_64(MulAmt) || MulAmt == 3 || MulAmt == 5 || MulAmt == 9) + if (isPowerOf2_64(MulAmt)) return SDValue(); + SDLoc DL(N); + if (MulAmt == 3 || MulAmt == 5 || MulAmt == 9) + return DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0), + N->getOperand(1)); + uint64_t MulAmt1 = 0; uint64_t MulAmt2 = 0; if ((MulAmt % 9) == 0) { @@ -33241,7 +33246,6 @@ static SDValue combineMul(SDNode *N, SelectionDAG &DAG, MulAmt2 = MulAmt / 3; } - SDLoc DL(N); SDValue NewMul; if (MulAmt2 && (isPowerOf2_64(MulAmt2) || MulAmt2 == 3 || MulAmt2 == 5 || MulAmt2 == 9)){ diff --git a/llvm/test/CodeGen/X86/imul.ll b/llvm/test/CodeGen/X86/imul.ll index 6896700..761484c 100644 --- a/llvm/test/CodeGen/X86/imul.ll +++ b/llvm/test/CodeGen/X86/imul.ll @@ -119,7 +119,8 @@ define i32 @mul3_32(i32 %A) { ; ; X86-LABEL: mul3_32: ; X86: # %bb.0: -; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: retl ; But why?! %mul = mul i32 %A, 3 @@ -134,9 +135,10 @@ define i64 @mul3_64(i64 %A) { ; ; X86-LABEL: mul3_64: ; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,2), %ecx ; X86-NEXT: movl $3, %eax ; X86-NEXT: mull {{[0-9]+}}(%esp) -; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %ecx ; X86-NEXT: addl %ecx, %edx ; X86-NEXT: retl %mul = mul i64 %A, 3 diff --git a/llvm/test/CodeGen/X86/mul-constant-i16.ll b/llvm/test/CodeGen/X86/mul-constant-i16.ll index 60a69df..a90814c 100644 --- a/llvm/test/CodeGen/X86/mul-constant-i16.ll +++ b/llvm/test/CodeGen/X86/mul-constant-i16.ll @@ -37,7 +37,8 @@ define i16 @test_mul_by_2(i16 %x) { define i16 @test_mul_by_3(i16 %x) { ; X86-LABEL: test_mul_by_3: ; X86: # %bb.0: -; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: retl ; @@ -72,7 +73,8 @@ define i16 @test_mul_by_4(i16 %x) { define i16 @test_mul_by_5(i16 %x) { ; X86-LABEL: test_mul_by_5: ; X86: # %bb.0: -; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,4), %eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: retl ; @@ -147,7 +149,8 @@ define i16 @test_mul_by_8(i16 %x) { define i16 @test_mul_by_9(i16 %x) { ; X86-LABEL: test_mul_by_9: ; X86: # %bb.0: -; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,8), %eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: retl ; diff --git a/llvm/test/CodeGen/X86/mul-constant-i32.ll b/llvm/test/CodeGen/X86/mul-constant-i32.ll index b3d2c07..6468c3f 100644 --- a/llvm/test/CodeGen/X86/mul-constant-i32.ll +++ b/llvm/test/CodeGen/X86/mul-constant-i32.ll @@ -107,7 +107,8 @@ define i32 @test_mul_by_2(i32 %x) { define i32 @test_mul_by_3(i32 %x) { ; X86-LABEL: test_mul_by_3: ; X86: # %bb.0: -; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: retl ; ; X64-HSW-LABEL: test_mul_by_3: @@ -209,7 +210,8 @@ define i32 @test_mul_by_4(i32 %x) { define i32 @test_mul_by_5(i32 %x) { ; X86-LABEL: test_mul_by_5: ; X86: # %bb.0: -; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,4), %eax ; X86-NEXT: retl ; ; X64-HSW-LABEL: test_mul_by_5: @@ -415,7 +417,8 @@ define i32 @test_mul_by_8(i32 %x) { define i32 @test_mul_by_9(i32 %x) { ; X86-LABEL: test_mul_by_9: ; X86: # %bb.0: -; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,8), %eax ; X86-NEXT: retl ; ; X64-HSW-LABEL: test_mul_by_9: diff --git a/llvm/test/CodeGen/X86/mul-constant-i64.ll b/llvm/test/CodeGen/X86/mul-constant-i64.ll index 538bc5c..6b860f1 100644 --- a/llvm/test/CodeGen/X86/mul-constant-i64.ll +++ b/llvm/test/CodeGen/X86/mul-constant-i64.ll @@ -107,9 +107,10 @@ define i64 @test_mul_by_2(i64 %x) { define i64 @test_mul_by_3(i64 %x) { ; X86-LABEL: test_mul_by_3: ; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,2), %ecx ; X86-NEXT: movl $3, %eax ; X86-NEXT: mull {{[0-9]+}}(%esp) -; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %ecx ; X86-NEXT: addl %ecx, %edx ; X86-NEXT: retl ; @@ -207,9 +208,10 @@ define i64 @test_mul_by_4(i64 %x) { define i64 @test_mul_by_5(i64 %x) { ; X86-LABEL: test_mul_by_5: ; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,4), %ecx ; X86-NEXT: movl $5, %eax ; X86-NEXT: mull {{[0-9]+}}(%esp) -; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %ecx ; X86-NEXT: addl %ecx, %edx ; X86-NEXT: retl ; @@ -416,9 +418,10 @@ define i64 @test_mul_by_8(i64 %x) { define i64 @test_mul_by_9(i64 %x) { ; X86-LABEL: test_mul_by_9: ; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: leal (%eax,%eax,8), %ecx ; X86-NEXT: movl $9, %eax ; X86-NEXT: mull {{[0-9]+}}(%esp) -; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %ecx ; X86-NEXT: addl %ecx, %edx ; X86-NEXT: retl ;