From: Elena Demikhovsky <elena.demikhovsky@intel.com>
Date: Sun, 7 Aug 2016 09:29:34 +0000 (+0000)
Subject: AVX-512: Added a test for cmp intrinsics
X-Git-Tag: llvmorg-4.0.0-rc1~13114
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2fabdcc60ac50da4ac550199a642615968f312a7;p=platform%2Fupstream%2Fllvm.git

AVX-512: Added a test for cmp intrinsics

This is a new test that should explore a current suboptimal sequence in passing values between cmp and kor intrinsics.
The code will be optimized in an upcoming patch.

Submitted bug here:
https://llvm.org/bugs/show_bug.cgi?id=28839

llvm-svn: 277954
---

diff --git a/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll b/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
new file mode 100644
index 0000000..2c40c96
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
+
+; This test checks optimal passing values between "cmp" and "kor" intrinsics
+; PR28839
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: nounwind readnone uwtable
+define zeroext i16 @cmp_kor_seq_16(<16 x float> %a, <16 x float> %b, <16 x float> %c, <16 x float> %d, <16 x float> %x) local_unnamed_addr #0 {
+; CHECK-LABEL: cmp_kor_seq_16:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    vcmpgeps %zmm4, %zmm0, %k0
+; CHECK-NEXT:    kmovw %k0, %eax
+; CHECK-NEXT:    vcmpgeps %zmm4, %zmm1, %k0
+; CHECK-NEXT:    kmovw %k0, %ecx
+; CHECK-NEXT:    vcmpgeps %zmm4, %zmm2, %k0
+; CHECK-NEXT:    kmovw %k0, %edx
+; CHECK-NEXT:    vcmpgeps %zmm4, %zmm3, %k0
+; CHECK-NEXT:    kmovw %k0, %esi
+; CHECK-NEXT:    kmovw %ecx, %k0
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    korw %k0, %k1, %k0
+; CHECK-NEXT:    kmovw %esi, %k1
+; CHECK-NEXT:    kmovw %edx, %k2
+; CHECK-NEXT:    korw %k1, %k2, %k1
+; CHECK-NEXT:    korw %k1, %k0, %k0
+; CHECK-NEXT:    kmovw %k0, %eax
+; CHECK-NEXT:    retq
+entry:
+  %0 = tail call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %a, <16 x float> %x, i32 13, i16 -1, i32 4)
+  %1 = tail call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %b, <16 x float> %x, i32 13, i16 -1, i32 4)
+  %2 = tail call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %c, <16 x float> %x, i32 13, i16 -1, i32 4)
+  %3 = tail call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %d, <16 x float> %x, i32 13, i16 -1, i32 4)
+  %4 = tail call i16 @llvm.x86.avx512.kor.w(i16 %0, i16 %1) #2
+  %5 = tail call i16 @llvm.x86.avx512.kor.w(i16 %2, i16 %3) #2
+  %6 = tail call i16 @llvm.x86.avx512.kor.w(i16 %4, i16 %5) #2
+  ret i16 %6
+}
+
+; Function Attrs: nounwind readnone
+declare i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float>, <16 x float>, i32, i16, i32) #1
+
+; Function Attrs: nounwind readnone
+declare i16 @llvm.x86.avx512.kor.w(i16, i16) #1
+
+attributes #0 = { nounwind readnone uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="knl" "target-features"="+adx,+aes,+avx,+avx2,+avx512cd,+avx512er,+avx512f,+avx512pf,+bmi,+bmi2,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prefetchwt1,+rdrnd,+rdseed,+rtm,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone }
+attributes #2 = { nounwind }