From: Seung-Woo Kim Date: Wed, 13 Sep 2017 12:29:31 +0000 (+0900) Subject: LOCAL / usb: dwc_otg: remove build warnings X-Git-Tag: submit/tizen_4.0/20170915.014357~3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2f8d050d96330199cf9af1bd87a41dc795a03f65;p=platform%2Fkernel%2Flinux-rpi3.git LOCAL / usb: dwc_otg: remove build warnings There are build warnings for unused variable and casting from pointer to integer of different size. Remove the build warnings. NOTE: dwc_otg is not fully consider 64bit architecture and it stores pointer into uint32_t variable already. This patch just remove warnings for the converting. Change-Id: I4182041881dbd3002f331a006e2b70a26e0b10c5 Signed-off-by: Seung-Woo Kim --- diff --git a/drivers/usb/host/dwc_otg/dwc_otg_attr.c b/drivers/usb/host/dwc_otg/dwc_otg_attr.c index 9da0c92aaeca..74f724582338 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_attr.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_attr.c @@ -918,9 +918,10 @@ DEVICE_ATTR(regdump, S_IRUGO, regdump_show, 0); static ssize_t spramdump_show(struct device *_dev, struct device_attribute *attr, char *buf) { + /* dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); - - //dwc_otg_dump_spram(otg_dev->core_if); + dwc_otg_dump_spram(otg_dev->core_if); + */ return sprintf(buf, "SPRAM Dump\n"); } diff --git a/drivers/usb/host/dwc_otg/dwc_otg_driver.c b/drivers/usb/host/dwc_otg/dwc_otg_driver.c index 95943e075282..63dea19e418d 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_driver.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_driver.c @@ -835,8 +835,8 @@ static int dwc_otg_driver_probe( retval = -ENOMEM; goto fail; } - dev_dbg(&_dev->dev, "base=0x%08x\n", - (unsigned)dwc_otg_device->os_dep.base); + dev_dbg(&_dev->dev, "base=%p\n", + dwc_otg_device->os_dep.base); #endif /* diff --git a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c index 0163e9cf620b..9c902e8a7ae5 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c @@ -293,7 +293,7 @@ static int notrace fiq_iso_out_advance(struct fiq_state *st, int num_channels, i last = 1; /* New DMA address - address of bounce buffer referred to in index */ - hcdma.d32 = (uint32_t) &blob->channel[n].index[i].buf[0]; + hcdma.d32 = (uint32_t)(uintptr_t) &blob->channel[n].index[i].buf[0]; //hcdma.d32 = FIQ_READ(st->dwc_regs_base + HC_DMA + (HC_OFFSET * n)); //hcdma.d32 += st->channel[n].dma_info.slot_len[i]; fiq_print(FIQDBG_INT, st, "LAST: %01d ", last); @@ -1336,7 +1336,7 @@ void notrace dwc_otg_fiq_fsm(struct fiq_state *state, int num_channels) /* We got an interrupt, didn't handle it. */ if (kick_irq) { state->mphi_int_count++; - FIQ_WRITE(state->mphi_regs.outdda, (int) state->dummy_send); + FIQ_WRITE(state->mphi_regs.outdda, (unsigned int)(uintptr_t) state->dummy_send); FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); } @@ -1397,7 +1397,7 @@ void notrace dwc_otg_fiq_nop(struct fiq_state *state) FIQ_WRITE(state->dwc_regs_base + GINTMSK, gintmsk.d32); /* Force a clear before another dummy send */ FIQ_WRITE(state->mphi_regs.intstat, (1<<29)); - FIQ_WRITE(state->mphi_regs.outdda, (int) state->dummy_send); + FIQ_WRITE(state->mphi_regs.outdda, (unsigned int)(uintptr_t) state->dummy_send); FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); } diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c index 7710370b3036..d237e2d817b0 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c @@ -1027,9 +1027,9 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if) * moderately readable array casts. */ hcd->fiq_dmab = DWC_DMA_ALLOC(dev, (sizeof(struct fiq_dma_channel) * num_channels), &hcd->fiq_state->dma_base); - DWC_WARN("FIQ DMA bounce buffers: virt = 0x%08x dma = 0x%08x len=%d", - (unsigned int)hcd->fiq_dmab, (unsigned int)hcd->fiq_state->dma_base, - sizeof(struct fiq_dma_channel) * num_channels); + DWC_WARN("FIQ DMA bounce buffers: virt = %p dma = %pad len=%u", + hcd->fiq_dmab, &hcd->fiq_state->dma_base, + (uint32_t)sizeof(struct fiq_dma_channel) * num_channels); DWC_MEMSET(hcd->fiq_dmab, 0x6b, 9024); @@ -1510,7 +1510,7 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_hcd_t *hcd, struct fiq_channel_state *st, * state depending on transaction progress. */ blob = (struct fiq_dma_blob *) hcd->fiq_state->dma_base; - st->hcdma_copy.d32 = (uint32_t) &blob->channel[hc->hc_num].index[0].buf[0]; + st->hcdma_copy.d32 = (uint32_t)(uintptr_t) &blob->channel[hc->hc_num].index[0].buf[0]; /* Calculate the max number of CSPLITS such that the FIQ can time out * a transaction if it fails. */ @@ -1559,7 +1559,7 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_hcd_t *hcd, struct fiq_channel_state *st, ptr = qtd->urb->buf + frame_desc->offset; /* Point the HC at the DMA address of the bounce buffers */ blob = (struct fiq_dma_blob *) hcd->fiq_state->dma_base; - st->hcdma_copy.d32 = (uint32_t) &blob->channel[hc->hc_num].index[0].buf[0]; + st->hcdma_copy.d32 = (uint32_t)(uintptr_t) &blob->channel[hc->hc_num].index[0].buf[0]; /* fixup xfersize to the actual packet size */ st->hctsiz_copy.b.pid = 0; @@ -2005,7 +2005,6 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) dwc_list_link_t *qh_ptr; dwc_otg_qh_t *qh; int num_channels; - dwc_irqflags_t flags; dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE; #ifdef DEBUG_HOST_CHANNELS diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c index c8f52709a7d2..c7c1e5731f5e 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c @@ -948,8 +948,6 @@ static void release_channel(dwc_otg_hcd_t * hcd, { dwc_otg_transaction_type_e tr_type; int free_qtd; - dwc_irqflags_t flags; - int hog_port = 0; DWC_DEBUGPL(DBG_HCDV, " %s: channel %d, halt_status %d, xfer_len %d\n", diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c index 992269d61ecf..a46d575002d5 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c @@ -483,7 +483,7 @@ static void hcd_init_fiq(void *cookie) dwc_otg_hcd->fiq_state->mphi_regs.outddb = otg_dev->os_dep.mphi_base + 0x2c; dwc_otg_hcd->fiq_state->mphi_regs.intstat = otg_dev->os_dep.mphi_base + 0x50; dwc_otg_hcd->fiq_state->dwc_regs_base = otg_dev->os_dep.base; - DWC_WARN("MPHI regs_base at 0x%08x", (int)dwc_otg_hcd->fiq_state->mphi_regs.base); + DWC_WARN("MPHI regs_base at %p", dwc_otg_hcd->fiq_state->mphi_regs.base); //Enable mphi peripheral writel((1<<31),dwc_otg_hcd->fiq_state->mphi_regs.ctrl); #ifdef DEBUG