From: Frank Schaefer <fschaefer.oss@googlemail.com>
Date: Sun, 16 Apr 2017 17:35:43 +0000 (-0300)
Subject: [media] ov2640: add missing write to size change preamble
X-Git-Tag: v4.14-rc1~332^2~438
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2f7711b2ad3b2e2aa3e9e3db4d3a2887e38b52b3;p=platform%2Fkernel%2Flinux-rpi.git

[media] ov2640: add missing write to size change preamble

HSIZE and VSIZE bits 0 to 2 and HSIZE bit 11 are encoded in DSP register
SIZEL.

Signed-off-by: Frank Schäfer <fschaefer.oss@googlemail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
---

diff --git a/drivers/media/i2c/ov2640.c b/drivers/media/i2c/ov2640.c
index e207d1d..07a51f2 100644
--- a/drivers/media/i2c/ov2640.c
+++ b/drivers/media/i2c/ov2640.c
@@ -500,6 +500,9 @@ static const struct regval_list ov2640_init_regs[] = {
 static const struct regval_list ov2640_size_change_preamble_regs[] = {
 	{ BANK_SEL, BANK_SEL_DSP },
 	{ RESET, RESET_DVP },
+	{ SIZEL, SIZEL_HSIZE8_11_SET(UXGA_WIDTH) |
+		 SIZEL_HSIZE8_SET(UXGA_WIDTH) |
+		 SIZEL_VSIZE8_SET(UXGA_HEIGHT) },
 	{ HSIZE8, HSIZE8_SET(UXGA_WIDTH) },
 	{ VSIZE8, VSIZE8_SET(UXGA_HEIGHT) },
 	{ CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |