From: Ashish kumar Date: Wed, 27 Jan 2016 12:39:32 +0000 (+0530) Subject: armv8: ls2080a: Implement workaround for core errata 829520, 833471 X-Git-Tag: v2016.03-rc1~2^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2ea3a448ccfdd3d6f7e01060ba8fa49bd97a73e0;p=platform%2Fkernel%2Fu-boot.git armv8: ls2080a: Implement workaround for core errata 829520, 833471 829520: Code bounded by indirect conditional branch might corrupt instruction stream. Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect Predictor. 833471: VMSR FPSCR functional failure or deadlock. Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush. Signed-off-by: Ashish Kumar Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 2ee60d6..67b166c 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -168,6 +168,25 @@ apply_a57_core_errata: msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ #endif +#ifdef CONFIG_ARM_ERRATA_833471 + mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */ + /* FPSCR write flush. + * Note that in some cases where a flush is unnecessary this + could impact performance. */ + orr x0, x0, #1 << 38 + msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ +#endif + +#ifdef CONFIG_ARM_ERRATA_829520 + mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */ + /* Disable Indirect Predictor bit will prevent this erratum + from occurring + * Note that in some cases where a flush is unnecessary this + could impact performance. */ + orr x0, x0, #1 << 4 + msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ +#endif + #ifdef CONFIG_ARM_ERRATA_833069 mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */ /* Disable Enable Invalidates of BTB bit */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index f1b164f..3d8dac1 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -121,6 +121,10 @@ #define CONFIG_SYS_FSL_ERRATUM_A009663 #define CONFIG_SYS_FSL_ERRATUM_A009942 +/* ARM A57 CORE ERRATA */ +#define CONFIG_ARM_ERRATA_829520 +#define CONFIG_ARM_ERRATA_833471 + #elif defined(CONFIG_LS1043A) #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_CACHELINE_SIZE 64