From: Kewen Lin Date: Fri, 27 Aug 2021 01:23:17 +0000 (-0500) Subject: rs6000: Add missing unsigned info for some P10 bifs X-Git-Tag: upstream/12.2.0~5518 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2e64eec6719e596e7f095c977edcc63812be18a4;p=platform%2Fupstream%2Fgcc.git rs6000: Add missing unsigned info for some P10 bifs This patch is to make prototypes of some Power10 built-in functions consistent with what's in the documentation, as well as the vector version. Otherwise, useless conversions can be generated in gimple IR, and the vectorized versions will have inconsistent types. gcc/ChangeLog: * config/rs6000/rs6000-call.c (builtin_function_type): Add unsigned signedness for some Power10 bifs. --- diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index fd7f24d..3a07118 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -14823,6 +14823,11 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, case P8V_BUILTIN_ORC_V4SI_UNS: case P8V_BUILTIN_ORC_V2DI_UNS: case P8V_BUILTIN_ORC_V1TI_UNS: + case P10_BUILTIN_CFUGED: + case P10_BUILTIN_CNTLZDM: + case P10_BUILTIN_CNTTZDM: + case P10_BUILTIN_PDEPD: + case P10_BUILTIN_PEXTD: case P10V_BUILTIN_VCFUGED: case P10V_BUILTIN_VCLZDM: case P10V_BUILTIN_VCTZDM: