From: sje Date: Mon, 10 Dec 2012 22:19:16 +0000 (+0000) Subject: 2012-12-10 Steve Ellcey X-Git-Tag: upstream/4.9.2~8626 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2df386e3b89845b1e5603a3fa828fe949805b529;p=platform%2Fupstream%2Flinaro-gcc.git 2012-12-10 Steve Ellcey PR target/54061 rtl.h (IGNORED_DWARF_REGNUM): New. * dwarf2out.c (reg_loc_descriptor): Check for IGNORED_DWARF_REGNUM. (mem_loc_descriptor): Ditto. * config/mips/mips.h (ALL_COP_REG_FIRST): New. (ALL_COP_REG_LAST): New. (ALL_COP_REG_NUM): Redefine using above macros. * config/mips/mips.c (mips_option_override): Set mips_dbx_regno coprocessor entries to IGNORED_DWARF_REGNUM. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@194372 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 87e216b..7eb9437 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2012-12-10 Steve Ellcey + + PR target/54061 + rtl.h (IGNORED_DWARF_REGNUM): New. + * dwarf2out.c (reg_loc_descriptor): Check for IGNORED_DWARF_REGNUM. + (mem_loc_descriptor): Ditto. + * config/mips/mips.h (ALL_COP_REG_FIRST): New. + (ALL_COP_REG_LAST): New. + (ALL_COP_REG_NUM): Redefine using above macros. + * config/mips/mips.c (mips_option_override): Set mips_dbx_regno + coprocessor entries to IGNORED_DWARF_REGNUM. + 2012-12-10 H.J. Lu PR lto/55466 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index b6a2290..820b228 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -16757,6 +16757,9 @@ mips_option_override (void) for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++) mips_dbx_regno[i] = i + start; + for (i = ALL_COP_REG_FIRST; i <= ALL_COP_REG_LAST; i++) + mips_dbx_regno[i] = IGNORED_DWARF_REGNUM; + /* Accumulator debug registers use big-endian ordering. */ mips_dbx_regno[HI_REGNUM] = MD_DBX_FIRST + 0; mips_dbx_regno[LO_REGNUM] = MD_DBX_FIRST + 1; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 308b59b..60b26cb 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1641,8 +1641,11 @@ struct mips_cpu_info { #define COP3_REG_FIRST 144 #define COP3_REG_LAST 175 #define COP3_REG_NUM (COP3_REG_LAST - COP3_REG_FIRST + 1) -/* ALL_COP_REG_NUM assumes that COP0,2,and 3 are numbered consecutively. */ -#define ALL_COP_REG_NUM (COP3_REG_LAST - COP0_REG_FIRST + 1) + +/* These definitions assume that COP0, 2 and 3 are numbered consecutively. */ +#define ALL_COP_REG_FIRST COP0_REG_FIRST +#define ALL_COP_REG_LAST COP3_REG_LAST +#define ALL_COP_REG_NUM (ALL_COP_REG_LAST - ALL_COP_REG_FIRST + 1) #define DSP_ACC_REG_FIRST 176 #define DSP_ACC_REG_LAST 181 diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index f0256ae..c92fa4b 100644 --- a/gcc/dwarf2out.c +++ b/gcc/dwarf2out.c @@ -10499,7 +10499,12 @@ reg_loc_descriptor (rtx rtl, enum var_init_status initialized) if (hard_regno_nregs[REGNO (rtl)][GET_MODE (rtl)] > 1 || regs) return multiple_reg_loc_descriptor (rtl, regs, initialized); else - return one_reg_loc_descriptor (dbx_reg_number (rtl), initialized); + { + unsigned int dbx_regnum = dbx_reg_number (rtl); + if (dbx_regnum == IGNORED_DWARF_REGNUM) + return 0; + return one_reg_loc_descriptor (dbx_regnum, initialized); + } } /* Return a location descriptor that designates a machine register for @@ -11926,6 +11931,7 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, )) { dw_die_ref type_die; + unsigned int dbx_regnum; if (dwarf_strict) break; @@ -11935,8 +11941,12 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, GET_MODE_CLASS (mode) == MODE_INT); if (type_die == NULL) break; + + dbx_regnum = dbx_reg_number (rtl); + if (dbx_regnum == IGNORED_DWARF_REGNUM) + break; mem_loc_result = new_loc_descr (DW_OP_GNU_regval_type, - dbx_reg_number (rtl), 0); + dbx_regnum, 0); mem_loc_result->dw_loc_oprnd2.val_class = dw_val_class_die_ref; mem_loc_result->dw_loc_oprnd2.v.val_die_ref.die = type_die; mem_loc_result->dw_loc_oprnd2.v.val_die_ref.external = 0; @@ -12138,9 +12148,13 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, op0 = mem_loc_descriptor (ENTRY_VALUE_EXP (rtl), mode, VOIDmode, VAR_INIT_STATUS_INITIALIZED); else - op0 - = one_reg_loc_descriptor (dbx_reg_number (ENTRY_VALUE_EXP (rtl)), - VAR_INIT_STATUS_INITIALIZED); + { + unsigned int dbx_regnum = dbx_reg_number (ENTRY_VALUE_EXP (rtl)); + if (dbx_regnum == IGNORED_DWARF_REGNUM) + return NULL; + op0 = one_reg_loc_descriptor (dbx_regnum, + VAR_INIT_STATUS_INITIALIZED); + } } else if (MEM_P (ENTRY_VALUE_EXP (rtl)) && REG_P (XEXP (ENTRY_VALUE_EXP (rtl), 0))) diff --git a/gcc/rtl.h b/gcc/rtl.h index 213e0f5..c121f13 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -2439,6 +2439,9 @@ extern rtx gen_rtx_MEM (enum machine_mode, rtx); /* REGNUM never really appearing in the INSN stream. */ #define INVALID_REGNUM (~(unsigned int) 0) +/* REGNUM for which no debug information can be generated. */ +#define IGNORED_DWARF_REGNUM (INVALID_REGNUM - 1) + extern rtx output_constant_def (tree, int); extern rtx lookup_constant_def (tree);