From: Timothy Pearson Date: Fri, 26 Feb 2016 21:29:32 +0000 (-0600) Subject: drm/ast: Fix incorrect register check for DRAM width X-Git-Tag: v6.1~17078^2~3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2d02b8bdba322b527c5f5168ce1ca10c2d982a78;p=sdk%2Femulator%2Femulator-kernel.git drm/ast: Fix incorrect register check for DRAM width During DRAM initialization on certain ASpeed devices, an incorrect bit (bit 10) was checked in the "SDRAM Bus Width Status" register to determine DRAM width. Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05. Signed-off-by: Timothy Pearson Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie --- diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 9759009d1da3..b1480acbb3c3 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev) } while (ast_read32(ast, 0x10000) != 0x01); data = ast_read32(ast, 0x10004); - if (data & 0x400) + if (data & 0x40) ast->dram_bus_width = 16; else ast->dram_bus_width = 32;