From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Wed, 15 Apr 2020 18:05:42 +0000 (+0100)
Subject: [X86] Add generic cpu target for the slow division tests
X-Git-Tag: llvmorg-12-init~8936
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2bcbf1319e9c3a348432dde8449ff961de35ca68;p=platform%2Fupstream%2Fllvm.git

[X86] Add generic cpu target for the slow division tests

Baseline for any change due to D75567
---

diff --git a/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll b/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
index 84355448..75a00dd 100644
--- a/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
+++ b/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
@@ -1,6 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; Check that a division is bypassed when appropriate only.
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=atom       < %s | FileCheck -check-prefixes=CHECK,ATOM %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64     < %s | FileCheck -check-prefixes=CHECK,REST,X64 %s
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont < %s | FileCheck -check-prefixes=CHECK,REST,SLM %s
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake    < %s | FileCheck -check-prefixes=CHECK,REST,SKL %s
 ; RUN: llc -profile-summary-huge-working-set-size-threshold=1 -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake    < %s | FileCheck -check-prefixes=HUGEWS %s
@@ -62,6 +63,13 @@ define i64 @div64(i64 %a, i64 %b) {
 ; ATOM-NEXT:    # kill: def $eax killed $eax def $rax
 ; ATOM-NEXT:    retq
 ;
+; X64-LABEL: div64:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    movq %rdi, %rax
+; X64-NEXT:    cqto
+; X64-NEXT:    idivq %rsi
+; X64-NEXT:    retq
+;
 ; SLM-LABEL: div64:
 ; SLM:       # %bb.0: # %entry
 ; SLM-NEXT:    movq %rdi, %rcx
@@ -167,6 +175,13 @@ define i64 @div64_hugews(i64 %a, i64 %b) {
 ; ATOM-NEXT:    # kill: def $eax killed $eax def $rax
 ; ATOM-NEXT:    retq
 ;
+; X64-LABEL: div64_hugews:
+; X64:       # %bb.0:
+; X64-NEXT:    movq %rdi, %rax
+; X64-NEXT:    cqto
+; X64-NEXT:    idivq %rsi
+; X64-NEXT:    retq
+;
 ; SLM-LABEL: div64_hugews:
 ; SLM:       # %bb.0:
 ; SLM-NEXT:    movq %rdi, %rcx