From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 17 Dec 2022 15:33:04 +0000 (+0000)
Subject: [X86] All the WriteBLS instructions take 2uops, not 1uop
X-Git-Tag: upstream/17.0.6~23402
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2bc2bcb2460f675fd51504dad63704a280a56669;p=platform%2Fupstream%2Fllvm.git

[X86] All the WriteBLS instructions take 2uops, not 1uop

Confirmed by AMD SoG + Agner + uops.info
---

diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td
index 41ecce1..3b2272f 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver1.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td
@@ -231,6 +231,7 @@ def : InstRW<[WriteMove], (instrs COPY)>;
 
 // BMI1 BEXTR, BMI2 BZHI
 defm : ZnWriteResPair<WriteBEXTR, [ZnALU], 1>;
+defm : ZnWriteResPair<WriteBLS,   [ZnALU], 2, [1], 2, 4, 1>;
 defm : ZnWriteResPair<WriteBZHI,  [ZnALU], 1>;
 
 // IDIV
@@ -703,12 +704,6 @@ def ZnWriteBTRSCm : SchedWriteRes<[ZnAGU, ZnALU]> {
 def : SchedAlias<WriteBitTestSetImmRMW, ZnWriteBTRSCm>;
 def : SchedAlias<WriteBitTestSetRegRMW, ZnWriteBTRSCm>;
 
-// BLSI BLSMSK BLSR.
-// r,r.
-def : SchedAlias<WriteBLS, ZnWriteALULat2>;
-// r,m.
-def : SchedAlias<WriteBLSLd, ZnWriteALULat2Ld>;
-
 // PDEP PEXT.
 // r,r,r.
 def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rr", "PEXT(32|64)rr")>;
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver2.td b/llvm/lib/Target/X86/X86ScheduleZnver2.td
index 5905a66..0ff4ba3 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver2.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver2.td
@@ -230,6 +230,7 @@ def : InstRW<[WriteMove], (instrs COPY)>;
 
 // BMI1 BEXTR, BMI2 BZHI
 defm : Zn2WriteResPair<WriteBEXTR, [Zn2ALU], 1>;
+defm : Zn2WriteResPair<WriteBLS,   [Zn2ALU], 2, [1], 2, 4, 1>;
 defm : Zn2WriteResPair<WriteBZHI,  [Zn2ALU], 1>;
 
 // IDIV
@@ -713,12 +714,6 @@ def Zn2WriteBTRSCm : SchedWriteRes<[Zn2AGU, Zn2ALU]> {
 def : SchedAlias<WriteBitTestSetImmRMW, Zn2WriteBTRSCm>;
 def : SchedAlias<WriteBitTestSetRegRMW, Zn2WriteBTRSCm>;
 
-// BLSI BLSMSK BLSR.
-// r,r.
-def : SchedAlias<WriteBLS, Zn2WriteALULat2>;
-// r,m.
-def : SchedAlias<WriteBLSLd, Zn2WriteALULat2Ld>;
-
 // PDEP PEXT.
 // r,r,r.
 def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rr", "PEXT(32|64)rr")>;
diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s
index eebf53e..542140f 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s
@@ -57,18 +57,18 @@ tzcnt       (%rax), %rcx
 # CHECK-NEXT:  2      5     0.50    *                   bextrl	%eax, (%rbx), %ecx
 # CHECK-NEXT:  1      1     0.25                        bextrq	%rax, %rbx, %rcx
 # CHECK-NEXT:  2      5     0.50    *                   bextrq	%rax, (%rbx), %rcx
-# CHECK-NEXT:  1      2     0.25                        blsil	%eax, %ecx
-# CHECK-NEXT:  1      6     0.50    *                   blsil	(%rax), %ecx
-# CHECK-NEXT:  1      2     0.25                        blsiq	%rax, %rcx
-# CHECK-NEXT:  1      6     0.50    *                   blsiq	(%rax), %rcx
-# CHECK-NEXT:  1      2     0.25                        blsmskl	%eax, %ecx
-# CHECK-NEXT:  1      6     0.50    *                   blsmskl	(%rax), %ecx
-# CHECK-NEXT:  1      2     0.25                        blsmskq	%rax, %rcx
-# CHECK-NEXT:  1      6     0.50    *                   blsmskq	(%rax), %rcx
-# CHECK-NEXT:  1      2     0.25                        blsrl	%eax, %ecx
-# CHECK-NEXT:  1      6     0.50    *                   blsrl	(%rax), %ecx
-# CHECK-NEXT:  1      2     0.25                        blsrq	%rax, %rcx
-# CHECK-NEXT:  1      6     0.50    *                   blsrq	(%rax), %rcx
+# CHECK-NEXT:  2      2     0.25                        blsil	%eax, %ecx
+# CHECK-NEXT:  3      6     0.50    *                   blsil	(%rax), %ecx
+# CHECK-NEXT:  2      2     0.25                        blsiq	%rax, %rcx
+# CHECK-NEXT:  3      6     0.50    *                   blsiq	(%rax), %rcx
+# CHECK-NEXT:  2      2     0.25                        blsmskl	%eax, %ecx
+# CHECK-NEXT:  3      6     0.50    *                   blsmskl	(%rax), %ecx
+# CHECK-NEXT:  2      2     0.25                        blsmskq	%rax, %rcx
+# CHECK-NEXT:  3      6     0.50    *                   blsmskq	(%rax), %rcx
+# CHECK-NEXT:  2      2     0.25                        blsrl	%eax, %ecx
+# CHECK-NEXT:  3      6     0.50    *                   blsrl	(%rax), %ecx
+# CHECK-NEXT:  2      2     0.25                        blsrq	%rax, %rcx
+# CHECK-NEXT:  3      6     0.50    *                   blsrq	(%rax), %rcx
 # CHECK-NEXT:  1      2     0.25                        tzcntw	%ax, %cx
 # CHECK-NEXT:  2      6     0.50    *                   tzcntw	(%rax), %cx
 # CHECK-NEXT:  1      2     0.25                        tzcntl	%eax, %ecx
diff --git a/llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s
index 29d6f0c..8db8286 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s
@@ -57,18 +57,18 @@ tzcnt       (%rax), %rcx
 # CHECK-NEXT:  2      5     0.33    *                   bextrl	%eax, (%rbx), %ecx
 # CHECK-NEXT:  1      1     0.25                        bextrq	%rax, %rbx, %rcx
 # CHECK-NEXT:  2      5     0.33    *                   bextrq	%rax, (%rbx), %rcx
-# CHECK-NEXT:  1      2     0.25                        blsil	%eax, %ecx
-# CHECK-NEXT:  1      6     0.33    *                   blsil	(%rax), %ecx
-# CHECK-NEXT:  1      2     0.25                        blsiq	%rax, %rcx
-# CHECK-NEXT:  1      6     0.33    *                   blsiq	(%rax), %rcx
-# CHECK-NEXT:  1      2     0.25                        blsmskl	%eax, %ecx
-# CHECK-NEXT:  1      6     0.33    *                   blsmskl	(%rax), %ecx
-# CHECK-NEXT:  1      2     0.25                        blsmskq	%rax, %rcx
-# CHECK-NEXT:  1      6     0.33    *                   blsmskq	(%rax), %rcx
-# CHECK-NEXT:  1      2     0.25                        blsrl	%eax, %ecx
-# CHECK-NEXT:  1      6     0.33    *                   blsrl	(%rax), %ecx
-# CHECK-NEXT:  1      2     0.25                        blsrq	%rax, %rcx
-# CHECK-NEXT:  1      6     0.33    *                   blsrq	(%rax), %rcx
+# CHECK-NEXT:  2      2     0.25                        blsil	%eax, %ecx
+# CHECK-NEXT:  3      6     0.33    *                   blsil	(%rax), %ecx
+# CHECK-NEXT:  2      2     0.25                        blsiq	%rax, %rcx
+# CHECK-NEXT:  3      6     0.33    *                   blsiq	(%rax), %rcx
+# CHECK-NEXT:  2      2     0.25                        blsmskl	%eax, %ecx
+# CHECK-NEXT:  3      6     0.33    *                   blsmskl	(%rax), %ecx
+# CHECK-NEXT:  2      2     0.25                        blsmskq	%rax, %rcx
+# CHECK-NEXT:  3      6     0.33    *                   blsmskq	(%rax), %rcx
+# CHECK-NEXT:  2      2     0.25                        blsrl	%eax, %ecx
+# CHECK-NEXT:  3      6     0.33    *                   blsrl	(%rax), %ecx
+# CHECK-NEXT:  2      2     0.25                        blsrq	%rax, %rcx
+# CHECK-NEXT:  3      6     0.33    *                   blsrq	(%rax), %rcx
 # CHECK-NEXT:  1      2     0.25                        tzcntw	%ax, %cx
 # CHECK-NEXT:  2      6     0.33    *                   tzcntw	(%rax), %cx
 # CHECK-NEXT:  1      2     0.25                        tzcntl	%eax, %ecx