From: Esme-Yi <esme.yi@ibm.com>
Date: Sun, 28 Jun 2020 16:26:05 +0000 (+0000)
Subject: [NFC][PowerPC] Add run lines to test DivRemPairsPass.
X-Git-Tag: llvmorg-12-init~1667
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2b325f69cac9979ec2fba1393e3e10541e144afa;p=platform%2Fupstream%2Fllvm.git

[NFC][PowerPC] Add run lines to test DivRemPairsPass.
---

diff --git a/llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll b/llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
index c59bec6..e3dcf8e 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
@@ -1,6 +1,12 @@
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-PWR8 -implicit-check-not mod[us][wd]
+; RUN: opt < %s -div-rem-pairs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 | \
+; RUN:   llc -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-DRP
+; RUN: opt < %s -div-rem-pairs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 | \
+; RUN:   llc -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-DRP
+; RUN: opt < %s -div-rem-pairs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | \
+; RUN:   llc -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-PWR8 -implicit-check-not mod[us][wd]
 
 @mod_resultsw = local_unnamed_addr global i32 0, align 4
 @mod_resultud = local_unnamed_addr global i64 0, align 8
@@ -232,9 +238,6 @@ entry:
 }
 
 ; Function Attrs: norecurse nounwind
-; FIXME On power 9 this test will still produce modsw because the divide is in
-; a different block than the remainder. Due to the nature of the SDAG we cannot
-; see the div in the other block.
 define void @blocks_modulo_div_sw(i32 signext %a, i32 signext %b, i32 signext %c) local_unnamed_addr {
 entry:
   %div = sdiv i32 %a, %b
@@ -253,6 +256,14 @@ if.end:                                           ; preds = %if.then, %entry
 ; CHECK: div
 ; CHECK: modsw {{[0-9]+}}, 3, 4
 ; CHECK: blr
+; CHECK-DRP-LABEL: blocks_modulo_div_sw
+; CHECK-DRP-NOT: modsw
+; CHECK-DRP: div
+; CHECK-DRP-NOT: modsw
+; CHECK-DRP: mull
+; CHECK-DRP-NOT: modsw
+; CHECK-DRP: sub
+; CHECK-DRP: blr
 ; CHECK-PWR8-LABEL: blocks_modulo_div_sw
 ; CHECK-PWR8: div
 ; CHECK-PWR8: mull
@@ -260,4 +271,3 @@ if.end:                                           ; preds = %if.then, %entry
 ; CHECK-PWR8: blr
 }
 
-