From: Artyom Tarasenko Date: Fri, 8 Aug 2014 20:48:00 +0000 (+0200) Subject: target-sparc64: implement Short Floating-Point Store Instructions X-Git-Tag: TizenStudio_2.0_p2.3.2~208^2~651^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2a5fade753e66ae68f0131962391cd78b99afa53;p=sdk%2Femulator%2Fqemu.git target-sparc64: implement Short Floating-Point Store Instructions Implement Short Floating-Point Store Instructions as described in the chapter 13.5.2 of UltraSPARC-IIi User's Manual. Particularly this instructions are used by NetBSD 4.0.1+ /sparc64 Signed-off-by: Artyom Tarasenko Signed-off-by: Mark Cave-Ayland --- diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index 03bd9f9..1a62e19 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -2154,7 +2154,6 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, unsigned int i; target_ulong val; - helper_check_align(env, addr, 3); addr = asi_address_mask(env, asi, addr); switch (asi) { @@ -2192,7 +2191,21 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, } return; + case 0xd2: /* 16-bit floating point load primary */ + case 0xd3: /* 16-bit floating point load secondary */ + case 0xda: /* 16-bit floating point load primary, LE */ + case 0xdb: /* 16-bit floating point load secondary, LE */ + helper_check_align(env, addr, 1); + /* Fall through */ + case 0xd0: /* 8-bit floating point load primary */ + case 0xd1: /* 8-bit floating point load secondary */ + case 0xd8: /* 8-bit floating point load primary, LE */ + case 0xd9: /* 8-bit floating point load secondary, LE */ + val = env->fpr[rd / 2].l.lower; + helper_st_asi(env, addr, val, asi & 0x8d, ((asi & 2) >> 1) + 1); + return; default: + helper_check_align(env, addr, 3); break; }