From: shaochan.liu Date: Fri, 25 Oct 2019 05:24:26 +0000 (+0800) Subject: lcd: tl1: tcon chpi phy setting update [2/2] X-Git-Tag: hardkernel-4.9.236-104~483 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2a5149de9080636ac075ab7f17ad97490102a855;p=platform%2Fkernel%2Flinux-amlogic.git lcd: tl1: tcon chpi phy setting update [2/2] PD#SWPL-13250 Problem: tcon chpi phy setting update Solution: add tcon chpi phy setting update Verify: x301_t962x2 Change-Id: I84b6f4298f64697ee33376ec866e5ec34174227e Signed-off-by: shaochan.liu --- diff --git a/drivers/amlogic/media/vout/lcd/lcd_common.h b/drivers/amlogic/media/vout/lcd/lcd_common.h index c5cd9cd..4053855 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_common.h +++ b/drivers/amlogic/media/vout/lcd/lcd_common.h @@ -41,7 +41,8 @@ /* 20190308: add more panel clk_ss_level step for tl1 */ /* 20190520: add vbyone hw filter user define support */ /* 20190911: add lcd_init_level for tl1 */ -#define LCD_DRV_VERSION "20190911" +/* 20191025: tcon chpi phy setting update */ +#define LCD_DRV_VERSION "20191025" #define VPP_OUT_SATURATE (1 << 0) @@ -86,6 +87,8 @@ extern void lcd_vbyone_phy_set(struct lcd_config_s *pconf, int status); extern void lcd_mlvds_phy_set(struct lcd_config_s *pconf, int status); extern void lcd_p2p_phy_set(struct lcd_config_s *pconf, int status); extern void lcd_mipi_phy_set(struct lcd_config_s *pconf, int status); +int lcd_phy_probe(void); +void lcd_phy_tcon_chpi_bbc_init_tl1(int delay); /* lcd tcon */ extern unsigned int lcd_tcon_reg_read(unsigned int addr); diff --git a/drivers/amlogic/media/vout/lcd/lcd_phy_config.c b/drivers/amlogic/media/vout/lcd/lcd_phy_config.c index 4fab78d..1509dd4 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_phy_config.c +++ b/drivers/amlogic/media/vout/lcd/lcd_phy_config.c @@ -29,6 +29,8 @@ #include "lcd_phy_config.h" #include "lcd_common.h" +static int phy_ctrl_bit_on; + static unsigned int lcd_lvds_channel_on_value(struct lcd_config_s *pconf) { unsigned int channel_on = 0; @@ -98,24 +100,27 @@ static unsigned int lcd_lvds_channel_on_value(struct lcd_config_s *pconf) void lcd_phy_cntl_set_tl1(int status, unsigned int data32, int flag) { unsigned int cntl16 = 0x80000000; + unsigned int data = 0; unsigned int tmp = 0; if (lcd_debug_print_flag) LCDPR("%s: %d\n", __func__, status); if (status) { - if (is_meson_rev_c()) - data32 |= ((1 << 16) | (1 << 0)); + data32 |= ((phy_ctrl_bit_on << 16) | (phy_ctrl_bit_on << 0)); if (flag) - cntl16 = flag; - tmp |= ((1 << 18) | (1 << 2)); + tmp |= ((1 << 18) | (1 << 2)); } else { - if (is_meson_rev_a() || is_meson_rev_b()) - data32 |= ((1 << 16) | (1 << 0)); + if (phy_ctrl_bit_on) + data = 0; + else + data = 1; + data32 |= ((data << 16) | (data << 0)); + cntl16 = 0; lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0); } - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, tmp); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, cntl16); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, tmp); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); @@ -481,3 +486,68 @@ void lcd_mipi_phy_set(struct lcd_config_s *pconf, int status) } } } + +void lcd_phy_tcon_chpi_bbc_init_tl1(int delay) +{ + unsigned int data32 = 0x06020602; + unsigned int tmp = 0; + + udelay(delay); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL1, 1, 3, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL1, 1, 19, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL2, 1, 3, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL2, 1, 19, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL3, 1, 3, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL3, 1, 19, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL4, 1, 3, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL4, 1, 19, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL6, 1, 3, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL6, 1, 19, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL7, 1, 3, 1); + lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL7, 1, 19, 1); + LCDPR("%s: delay: %dus\n", __func__, delay); + + data32 |= ((phy_ctrl_bit_on << 16) | + (phy_ctrl_bit_on << 0)); + tmp |= ((1 << 18) | (1 << 2)); + + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xff2027ef); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0x80000000); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, tmp); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); +} + +int lcd_phy_probe(void) +{ + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + if (is_meson_rev_c()) + phy_ctrl_bit_on = 1; + else + phy_ctrl_bit_on = 0; + break; + case LCD_CHIP_G12B: + if (is_meson_rev_b()) + phy_ctrl_bit_on = 1; + else + phy_ctrl_bit_on = 0; + break; + default: + break; + } + + return 0; +} diff --git a/drivers/amlogic/media/vout/lcd/lcd_tcon.c b/drivers/amlogic/media/vout/lcd/lcd_tcon.c index e2fc83f..bfd300b 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_tcon.c +++ b/drivers/amlogic/media/vout/lcd/lcd_tcon.c @@ -222,43 +222,6 @@ static int lcd_tcon_top_set_tl1(struct lcd_config_s *pconf) return 0; } -static void lcd_tcon_chpi_bbc_init_tl1(int delay) -{ - unsigned int data32; - - udelay(delay); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL1, 1, 3, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL1, 1, 19, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL2, 1, 3, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL2, 1, 19, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL3, 1, 3, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL3, 1, 19, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL4, 1, 3, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL4, 1, 19, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL6, 1, 3, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL6, 1, 19, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL7, 1, 3, 1); - lcd_hiu_setb(HHI_DIF_CSI_PHY_CNTL7, 1, 19, 1); - LCDPR("%s: delay: %dus\n", __func__, delay); - - data32 = 0x06020602; - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xff2027ef); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0x80000000); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); -} - static int lcd_tcon_enable_tl1(struct lcd_config_s *pconf) { struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); @@ -277,7 +240,7 @@ static int lcd_tcon_enable_tl1(struct lcd_config_s *pconf) if (pconf->lcd_basic.lcd_type == LCD_P2P) { switch (pconf->lcd_control.p2p_config->p2p_type) { case P2P_CHPI: - lcd_tcon_chpi_bbc_init_tl1(n); + lcd_phy_tcon_chpi_bbc_init_tl1(n); break; default: break; diff --git a/drivers/amlogic/media/vout/lcd/lcd_vout.c b/drivers/amlogic/media/vout/lcd/lcd_vout.c index 0b98d6b..9bbdf45 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_vout.c +++ b/drivers/amlogic/media/vout/lcd/lcd_vout.c @@ -1343,6 +1343,7 @@ static int lcd_config_probe(struct platform_device *pdev) lcd_driver->vsync_none_timer_flag = 0; lcd_driver->power_ctrl = lcd_power_ctrl; lcd_driver->module_reset = lcd_module_reset; + lcd_phy_probe(); lcd_clk_config_probe(); lcd_config_default(); lcd_init_vout();